Using a new technique, a substrate could be prepared enabling any fab to simply integrate a monolithic 3D device without the need to change the current frontline fab process.
We were invited to join a panel session titled: “Monolithic 3D: Will it Happen and if so…” at IEEE 3D-Test Workshop Oct. 9, 2015. So we are happy to see monolithic 3D on the title, but then the title also suggests that the industry is wondering is it real or is it a pipe dream. The doubts are in opposition to companies such as Qualcomm who strongly advocate it, and the support CAE which Leti, in collaboration with ST Micro and IBM, are presenting monolithic 3D as the “low-cost scaling” for 2018. See chart below from the July 2015 Leti Day.
The doubts might relate to the technology challenge illustrated by the following slide:
The upcoming IEEE S3S Conference 2015 in Sonoma, CA, on October 5th thru 8th provides comprehensive coverage of R&D activities in the monolithic 3D space. It starts with short courses on Monday. On Tuesday there will be a planery talk – “Sustaining the Silicon Revolution: From 3-D Transistors to 3-D Integration” by Prof. Tsu-Jae King Liu, followed by “3D-Invited Monolithic 3D Alternative Technologies” session with representives of Qualcomm, CEA Leti, Taiwan National Nano Device Laboratories, Stanford University and UCLA presenting and updating on the state of monolithic 3D technologies currently being developed arround the world as being illustrated in the following slide:
Then on Wednesday we would have an additional session of “Invited Talks on M3DI” followed by a “Selected Papers on M3DI” session.
In short the most comprehensive technical event on the emerging monolithic 3D technologies.
Yet — the question “Monolithic 3D: Will it Happen…” is still being asked.
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