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Memory/Selector Elements for Intel Optane XPoint Memory

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jeongdongchoe
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Re: compare to DRAM, not just NAND
jeongdongchoe   6/22/2017 11:45:28 AM
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Based on our TechInsights materials analysis.

Another chalcogenide-based alloy with different elements from PCM layer.

Ron Neale
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Re: compare to DRAM, not just NAND
Ron Neale   6/21/2017 6:09:56 PM
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  Jeondgongchoe:- Is your staement on the composition of the threshold switch material "another chalcogenide-based alloy with arsenic (As) doped" based on your own chemical composition analysis or from another source?

resistion
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Re: compare to DRAM, not just NAND
resistion   6/21/2017 8:48:58 AM
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It looks like 4 SADP layers, x line and y line, repeated twice for the upper and lower tiers. Furthermore the lines need to connect down to the CUA. The wafer is more expensive than 20 nm DRAM but the density is higher. By the way, it has no obvious advantage over SLC NAND product.

jeongdongchoe
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Re: compare to DRAM, not just NAND
jeongdongchoe   6/20/2017 1:43:16 PM
Regarding DRAM technology, Samsung has begun to mass-produce their first 10 nm-class DRAM products, and we've taken this opportunity to analyze and compare it to the previous generations of 25 nm and 20 nm DRAM products. During our analysis, we discovered the technology node is 18 nm which we believe is the smallest half pitch used to design active pattern.

The Samsung 18 nm 8 Gb DRAM die has a 0.189 Gb/mm2. Compared to their 20 nm 8 Gb die, memory density has increased by 32.8%, while the cell size (0.0026 µm2) is decreased by 21.2%. Figure 1 shows a comparison of DRAM die size and memory density from Samsung, SK Hynix and Micron's 30 nm-class, 20 nm-class and 10 nm-class DRAM products.

You can find a comparison of DRAM die size and memory density from Samsung, SK Hynix and Micron from TechInsights DRAM technology blog written by Jeongdong Choe:

http://www.techinsights.com/about-techinsights/overview/blog/samsung-18-nm-dram-cell-integration-qpt-and-higher-uniformed-capacitor-high-k-dielectrics/

Memory density of XPoint is higher than DRAM, but less than NAND due to MLC and TLC NAND operation. 

TanjB
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compare to DRAM, not just NAND
TanjB   6/20/2017 12:18:05 PM
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Since Intel plan products which compete for memory slots, it makes sense to compare silicon efficiency to DRAM chips not just NAND.  Also, process complexity is an issue.  Looks like the 3D Xpoint chip needs a lot of 20nm lithography.  Self aligned?  All reusing same mask?

It has been a long time since any teardowns of current DRAM.  What is the state of the art there, is there progress?

 

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