When the semiconductor industry began the transition from 200-mm wafers to 300-mm wafers more than a decade ago, chip makers convinced tool suppliers to foot the bill for the R&D required to make the move with the promise that they would be justly and richly rewarded with robust sales of the new systems, which much of the industry appeared anxious to adopt. But they were left holding the bag when the dot come bubble burst and—surprise—chip makers decided to delay deployment of 300-mm capacity.
Many equipment industry executives were understandably bitter about this. This was in large part the reason that, when chip makers first began making noise about moving to 450-mm wafers a few years ago, the sound you heard was mostly echos and crickets chirping.
A lot of people were skeptical right from the beginning that 450-mm would happen at all. Now it appears that 450-mm is inevitable, though the conventional wisdom holds that only a handful of chip makers—notably Intel Corp., Samsung Electronics Co. Ltd., Taiwan Semiconductor Manufacturing Co. Ltd. (TSMC) and Globalfoundries Inc.—will ever build 450-mm manufacturing lines.
Still, right from the start, there has been much debate about how tool suppliers and their customers would divvy up the R&D costs associated with moving to the new wafer size. (Bob Johnson of Gartner Inc. said this week that the cumulative cost of 450-mm development will be about $17 billion, about $2 billion of which is being spent this year, though he acknowledged that other estimates vary widely).
Some fledgling development efforts are now well underway, including the Global 450 Consortium, a $4.8 billion collaborative effort housed at the Albany NanoTech Complex and backed by the companies mentioned above, as well as IBM Corp.
For some tool makers, though, this was not enough. ASML Holding NV, the dominant player in lithography equipment, was largely seen dragging its feet on 450-mm. Moving to 450-mm will require new lithography equipment with more advanced stages that can support the increased size and weight without creating vibrations that would make accurate lithography exposure impossible. Given the fact that no more than a handful of chip makers are expected to buy the new tools, ASML foresaw a limited return on the considerable investment that would be required.
ASML of course has now come around, but only after the firm devised an innovative equity-plus-research funding scheme that asks those chip makers with the most to gain from the move to 450-mm wafers—and extreme ultraviolet (EUV) lithography that matter—to foot some of the bill for new technology up front.
On Monday, Intel announced it would acquire a 15 percent stake in ASML as part of a $4.1 billion deal to accelerate the development of 450-mm and EUV lithography. In addition to paying over $3 billion for the stake in ASML, Intel is also contributing more than $1 billion more directly to the development of the new technologies. Intel, of course, also committed to advanced purchase orders for 450-mm and EUV development and production tools.
The report by the Taiwan External Trade Development Council (TAITRA) quoted an anonymous source saying that TSMC's projected delivery of 3-D chips matches that of Intel, the world's biggest chip maker. Intel announced with great fanfare in May that it would begin high-volume production of 3-D chips using tri-gate transistors by the end of the year.
Did you ever correct this story ?
You never did -
and now you're commenting on ASML?
FYI Solid State has an excellent site:
In fact I did publish a response taking responsibility for my error in the case of reporting on that TAITRA report. You can find it here.
I think that both TriGate and TSV's are 3-D technolgies. Back to the basics of Moore's law - reduction of the area of the transistor and the cells used for creating microelectornics devices will reduce the cost of the manufactring. There are side benfits of potential increase in speed and reduced energy per switching action that can be capture through this effort. Moore's law will end due to laws of physiscs ( how small can switching device get). As part of getting closer to the the physics limit - there is need for more vertical structures to provide the finctionality needed to reduce space. In the previous 15-20 years it was by adding metal layers; Then came incorporation of new materils into the stack that required more processing (layers = vertical additions). Now we are in Tri Gate and TSVs that again - allow to build "High Risers"in different ways ( condos's in the bottom floor, or simply put one strucutre on top of the other). However - we get to the point that the saving in silicon area in each new generation will be offset by the cost of additional processing. That is when Moore's law that we enjoyed it for the last 4 decades, stops- probably a bit before the absolute physical limitaion.
Interesting that ASML went public on Intel while telling analysts that Samsung and TSMC have 45 days to get in on the deal at the same price.
The argument runs that ASML was obliged to go public once it had signed the deal with Intel.
But I have known public companies keep secrets while they dot the tees and cross the eyes.
Could ASML be trying a touch of high-pressure salespersonship?
Will it rebound the benefit of Nikon?
It seems to me that there is little doubt that ASML went public with this deal because a) it's a big boost for both 450 and EUV (not to mention a vote of confidence for EUV) and b) to put the heat on TSMC and Saumsun. As you say, it would be no big deal for ASML to keep at least part of this plan a secret. But ASML wants the world to know that Samsung and TSMC have a shot to get involved too.
Could this be a boost for Nikon? I think if Nikon has the ability to match ASML in either of this technologies, now is its golden opportunity to turn the tides and level the playing feel. But I don't think Nikon can do that at this point.
Ask Intel to publish their 450 mm economic analysis.
From SEMIcon show floor Intel has no reason to taper into ASML; they are already a Tier #1 customer. So what are Intel's reasons in this 450 mm development investment? Access, design input, custom configuration, leap frog, allocation, first dibs? Even ASML is still trying to figure out the real Intel reasons.
Intel's costs are rising because their current 300 mm fabrication is inefficient where 1/3 of production volume is priced below cost. Every Intel production generation regardless of process and equipoment generation demonstrates this continuous fact.
450 mm fabrication is not going to change this because Intel's monopoly business model requires this inefficiency to pay for a) the exponential capital requirment of Rocks Law to pay for Moores Axiom, b)to continue a business strategy which gives processors for all types of clients away in order to drive Xeon at a monopoly profit deeper into data center.
450 mm fabrication aim continues Intel myth masking aim; to command, control and consolidate whatever remains in the end. Obviously Intel will end up owning ASML. A healthy industy is a broad and diversified industry. An industry driven by natural time on organic demand drivers not Intel time and extra economic costs.
How can you make such wild statements with no facts?
Actually not just no facts, but actual nonsense.
No comapny can make billions in profit from selling a third of its output under cost unless subsidized by a government or "rich daddy"...Intel has neither:)
I have mixed feelings about this strategy. In most respects I guess it was somewhat inevitable that even ASML would want/need help with 450 mm and EUV litho, but is it one step too many down the road of industry consolidation? Are Intel, Samsung, and to a lesser extent TSMC going to be "too big to fail" at some point if they they start taking equity positions in equipment companies? Are AMAT, TEL, and other equipment companies going to follow ASMLs lead? Where does it all end?
This equity plus research funding is an interesting strategy. When your customer list is so short and development costs are so high, it makes a lot sense for both ASML and Intel. Should Samsung and TSMC join the party? That's a tougher call, now that Intel is in with both feet.
this is a desperate move by intel.
I bet the windows 8 news drive it crazy. it commands maybe 1% tablet market now, and imagine
2-3 year later 50% desktop will be intel nonrelated, with it's cost structure it's doomed.
the proliferation of 28-40nm at foundrys is making all these possible.
intel is trying to command some advantage as it used to have by doing this, oh well, this time it might not work, it just smells like kodak.
EUV is part of the deal. But phase one is 450. I think that is what Intel wants more. Intel's Yan Borodovsky spoke today about using complementary lithography, including 193 immersion, DSA and perhaps other technologies. But I think Intel is just trying to cover its bases. Intel still wants EUV badly. But it seems to me that the jury is still out on EUV's economic viability.
I think ASML has a duty to shareholders to announce any (share) price sensitive information. 300mm EUV R&D is done in all but power source/throughput (?). Intel wants 450mm EUV and 450mm ArF,KrF and immersion. This is the beginning of the end for Nikon, Intels traditional lithography partner. My money is on TSMC & Samsung to follow Intel's move.
@sprite0022: Great comment! In a tiny market like EUV litho tools, or DW Ebeam, a monopoly is appropriate. There are better uses for this kind of investment money. Kudo's to Nikon and Canon for dropping out of the advanced litho game for DSRL's!
In my opinion, I am sure that all of the companies you mention would like to ask for money up front. I am not sure that they can. ASML holds all of the cards in litho. I am not sure any other company would be negotiating from such a position of strength.
I agree Intel wants larger wafers. Racing process is increasing their number of process steps driving moore inefficiencies into their fabrication process.
History shows Intel will bypass disruptive innovations at adoption stage if an alternate method is farther along its development curve;
multi dice package vs. multicore dice comes to mind. Sound strategy reducing manufacturing risk this way. Especially when the moore costly solution is concealed by monopoly accounts practice.
Note of interest at Semicon session Lithography: Extending Double Patterning, Industrializing EUV and Complimentary Technologies in which Borodovsky presented, is that EBEAM was seen as the compliment to 193i & Directed Self Assembly not EUV.
I personally believe Intel will harvest their current lithography investment until applied science passes through innovation phase to identiy the next process commercial industrial art.
Complementary litho is too expensive, maybe only intel could afford it. Pitch splitting combined with a second NGL exposure - slower, more expensive and more risky than either by itself.
LELE is more reasonable in near term.
It's also hard to wrap gate+oxide around a Si channel within 20 nm.
Once we get to 10-14 nm, multipatterning will be more established than wherever EUV is at. There should be no further revolutionary changes in the litho patterning.
If we're starting over on other than Si most likely some contact method like imprint or soft stamping lithography might be the new starting point, not optical projection.
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