Tired of the us-versus-them bunker mentality politics of Washington in an election year? Welcome to the Silicon Valley, where the decades-old war of words between the two dominant suppliers of programmable logic can at times make the D.C. crowd seem downright collegial.
The latest occasion for disagreement, which bubbled to the surface after each reported earnings in the past two weeks, is over market share at the 28-nm node. Both companies began shipping 28-nm parts earlier this year (though, not surprisingly, there is some nuanced dispute about who was first). Both companies also claim the early market lead at the node.
During its earnings call this week, Altera executives suggested the company has 28-nm FPGA market share of about 60 percent. Xilinx estimates its 28-nm market share at about 70 percent. For those of you scoring at home, that's 130 percent, total. Now there's the way to grow a market.
Xilinx and Altera have been playing the tit-for-tat marketing game for years. The two companies have dominated the programmable logic space since the 1980s and cumulatively hold about 85 percent share of the market (higher than that at the high end of the market). In some respects, it's no wonder that their marketing rhetoric smacks of the bickering and one-upmanship borne by sibling rivalry: for each company, the other is the only real competition. (For more on the history of this dynamic, see Kevin Morris' classic piece from 2005).
Unlike Republicans and Democrats, however, there is one thing that Xilinx and Altera do agree on: Both have been claiming for some time that FPGAs are increasingly winning sockets that traditionally went to other types of chips, chiefly ASICs and ASSPs.
Moshe Gavrielov, president and CEO of Xilinx, has long championed the existence of a "programmable imperative" enticing customers to move from ASICs and ASSPs to FPGAs to save on the growing non-re-occurring engineering investment required to build the more traditional chips. During the Xilinx earnings call earlier this month, Gavrielov said 28-nm design win momentum continues at "an unprecedented pace" and that the company continues to see customers moving away from ASICs while Xilinx FPGAs integrate and displace "evermore" ASSPs.
Not to be outdone, John Daane, Altera's chairman, president and CEO, followed that up last week by proclaiming that Altera was seeing "great success" for 28-nm products. "We continue to open larger sections of the ASIC and ASSP markets for PLD displacement," Daane said.
Could these guys have been separated at birth?
Xilinx CEO Moshe Gavrielov (left) and Altera CEO John Daane. Separated at birth?
Gavrielov and Daane have been humming similar tunes for years. Though some holdouts still dispute the claim, mounting evidence—such as increased revenue for the FPGA vendors in recent years—supports the argument. And analysts have bought in, too.
"FPGAs continue to increase the overall addressable market with investments like 28-nm and embedded processor initiatives," said Ian Ing, an analyst at Lazard Capital Markets LLC, in an email exchange. (Though Ing added that communications infrastructure requirements are rapidly evolving and may tip the balance back in favor of ASICs and ASSPs in certain applications).
I think the flight to FPGA is pretty obvious, it is enough to check the number of ASIC starts annually...Jack is clearly biased as he is trying to promote eSilicon service so you can't blaming to claim otherwise...Kris
Jack Harding, president and CEO of eSilicon Corp., is a well-known skeptic of the notion that FPGAs are displacing ASICs.
Gavrielov said during an interview earlier this year that he respects Harding and his opinion, but that the success of fabless ASIC vendors or "value chain producers" like eSilicon does not mean there is not a flight to FPGAs. On the contrary, Gavrielov argues, as the cost of doing an ASIC skyrockets, firms look first to outsource them and then, eventually, to skip them altogether and go with FPGAs. The success of Xilinx and that of eSilicon is not mutually exclusive, he argues. But, according to Gavrielov, the success of eSilicon and others like it supports the business of ASICs is at its sunset.
David Patterson, known for his pioneering research that led to RAID, clusters and more, is part of a team at UC Berkeley that recently made its RISC-V processor architecture an open source hardware offering. We talk with Patterson and one of his colleagues behind the effort about the opportunities they see, what new kinds of designs they hope to enable and what it means for today’s commercial processor giants such as Intel, ARM and Imagination Technologies.