DesignCon 2012 starts January 30 and ends February 2nd in the Santa Clara Convention Center. The conference and exhibition promises to address issues around PCB design tools, RF and signal integrity, FPGA design, IC and semiconductor components, verification tools, and high-speed serial design. Sound like you? I bet it does.
The conference will include more than 100 tutorials and technical paper sessions, and the exhibition promises more than 130 vendors. Keynotes will be delivered by representatives from AMD, HP, and Microsoft. Live product teardowns include Amazon Fire, Nook Color, and Android Tablet.
Agilent will be providing an Education Forum, and ANSYS/Apache Design will offer sponsored training sessions that include presentations from Intel, Cisco, Micron, LSI, and Xilinx on chip and package modeling as well as system level verification for SI, PI, EMI, and thermal effects. This is a top-tier conference that is sponsored by: Agilent Technologies, Rambus, LeCroy, Tektronix, and Mentor Graphics. If you were inspired by the concepts at CES, this is the place to go to talk about how to make those prototypes into real products. If you are planning to go, use the comments section to sound off on what you hope to see/find there.
David Patterson, known for his pioneering research that led to RAID, clusters and more, is part of a team at UC Berkeley that recently made its RISC-V processor architecture an open source hardware offering. We talk with Patterson and one of his colleagues behind the effort about the opportunities they see, what new kinds of designs they hope to enable and what it means for today’s commercial processor giants such as Intel, ARM and Imagination Technologies.