I urge readers attending the International Solid-State Circuits Conference at the San Francisco Marriott Marquis Hotel Feb. 19 to 23 to check out the booth of publisher Springer.
I have been told that several of the authors of CHIPS 2020: A Guide to the Future of Nanotechnology will be on hand at a launch for the book being held there. You may remember I reviewed the book recently. Special times to meet the authors have been reserved on Monday, Feb. 20, 3pm to 6:30pm and on Tuesday, Feb. 21, at 5pm to 6:30pm.
Bernd Hoefflinger, lead author and editor of the book, tells me he hopes to get Burn Lin, vice president of lithography at TSMC along for the launch. According to Springer: "The most representative group, including Burn Lin (TSMC) for nanolithography, will be available Monday, 3pm to 4pm. So if you want to quiz Lin about EUV versus maskless e-beam lithography, that might be an opportunity.
David Patterson, known for his pioneering research that led to RAID, clusters and more, is part of a team at UC Berkeley that recently made its RISC-V processor architecture an open source hardware offering. We talk with Patterson and one of his colleagues behind the effort about the opportunities they see, what new kinds of designs they hope to enable and what it means for today’s commercial processor giants such as Intel, ARM and Imagination Technologies.