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Imperas was founded by Simon Davidmann, who also founded Co-Design Automation, which developed much of what is now SystemVerilog before being acquired by Synopsys. Imperas' focus is multicore design. At last year's Design Automation Conference, analyst Gary Smith said that Imperas may have the most interesting product at the conference.
The funny thing is, Imperas didn't introduce any product at DAC, and hasn't made any public introductions since. People from Imperas have participated in industry conferences, but the company has kept a tight wall of security around what it's actually up to.
You won't find much information at the Imperas web site, although you can read about the company's directors and funding. The web site says that Imperas "is an exciting new company producing groundbreaking products in the unified System Design Automation space. We believe that future ICs will not be designed and programmed with the traditional Verilog/VHDL/SystemC 'write RTL and then write embedded C' approach. They will be designed and programmed in a unified Systems Design Automation approach where hardware and software issues are combined."
Simon Davidmann wrote a commentary for EE Times last year that may be revealing. "As the industry moves forward, developing and programming multi-processor systems-on-chip (MPSoC) will require a unified systems design automation approach in which hardware and software technologies and design processes are combined in a seamless development environment," he wrote. Davidmann pointed to the need for fast simulation and compilers and debuggers that can handle parallelism.
At the Multicore Expo, Frank Schirrmeister, vice president of marketing for Imperas, spoke about software programming challenges for multicore architectures. Schirrmeister said multiprocessing presents three primary challenges: partitioning, parallelization, and optimization. What's needed, he said, is a programming model that makes it possible to create parallel applications, optimize the mapping of those applications onto parallel hardware, and gather data to guide the optimization decisions.
Schirrmeister said there's a need for a comprehensive programming environment that enables true hardware/software interaction and true hardware/software automation. It needs to consider speed/accuracy tradeoffs, software mapping and optimization, and hardware/software optimization. It needs to support true multiprocessor debugging and faster simulation. Usually, when a startup says there's a "need" for something, they're working on it.
This talk was aimed at software application developers, and my initial impression was that Imperas is developing a software development platform for selected multicore architectures, perhaps along similar lines as RapidMind or Peakstream. But wait, there's another part of Davidmann's EE Times commentary that's telling:
"It will have to be funded by the hardware world in which users — software developers — expect to receive as part of the silicon offering a state-of-the-art software development environment supporting the platform."
This suggests that Imperas is not just going after embedded software developers, who for the most part still think compilers should be free. "Funded by the hardware world" sounds more like an electronic system level (ESL) play. What would the hardware world fund? One possibility is a virtual prototyping environment that models hardware, such as that from Virtutech, which also presented at the Multicore Expo.
So what do we have here? Is it EDA, ESL, or embedded software? Does Imperas belong in the same grouping as Synopsys and Cadence, or with Green Hills Software and Wind River Systems? Or is Imperas an interesting hybrid that may confound categorization, and help break down the barriers between hardware and software design?
Posted by Richard Goering on Mar 29, 2007 07:30 PM in EDA Software
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