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Open analog constraint standard urged

Don't look now, but support is growing for a potential new EDA standards effort. This effort would provide a standard set of constraints for analog design.

Richard Goering
Richard Goering
EDA Software Editor

In several presentations at the Synopsys Interoperability Forum today (April 26), speakers called for an open analog design constraint standard. It's an ambitious goal, but it makes sense.

Much has been written about the need for a low-power constraint description format, and the ongoing battle between the Common Power Format (CPF) and the Unified Power Format (UPF). The idea is similar here, although hopefully without the competing standards. Whether we're talking about low-power IC design or analog design, engineers need to be able to specify constraints that convey design intent to downstream tools.

The analog constraints that are being discussed primarily apply to IC layout today. They include such concerns as alignment and orientation, symmetry, differential pairs, and shielding. The point is that each vendor has its own way for users to specify these constraints, leading to a hodge-podge of ad-hoc formats and a lot of translation. A standard would presumably provide one consistent way to specify analog constraints.

The goal, said Dave Millman, vice president of marketing at Ciranova, is an open, vendor-neutral constraint format. We have a common database with OpenAccess, but constraints are still driven by a limited number of tools, he said. Continue with that and we end up with closed constraints, tools that won't work in an integrated flow, and "broken OpenAccess flows."

"We have to have a way to translate information between tools consistently, easily and automatically," said Steve Ferguson, technical director for Pulsic Inc. "An ad-hoc approach to constraints is not going to work. Now each vendor has their own format. We just can't afford to do that again."

There's a lot of innovation underway in the analog layout world, noted Richard Morse, director of marketing at Silicon Canvas. "If we fail to provide an open constraint environment, or we allow it to be defined by a single vendor, we will stifle a lot of this innovation," he said.

It all makes sense, but there is a 600-pound gorilla in the room — Cadence Design Systems, which continues to dominate the analog IC layout market, and which declines to open its Skill language. Will Cadence support an effort for an open analog constraint format? They did provide a great gift to the industry with OpenAccess. We'll see if they're willing to follow up.



Posted by Richard Goering on Apr 26, 2007 08:53 PM in EDA Software


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