Posted: 8/24/98

Library vendor Aspec Technology Inc. (Sunnyvale, Calif.) has announced that it has verified both the OakDSPCore and PineDSPCore 16-bit digital signal processor (DSP) cores from the DSP Group Inc. (San Jose, Calif.) with 0.35- and 0.25-micron process technologies.

According to Aspec, the verification was proven through DSP Group's Verilog simulation model and testbench.

Aspec claims it is the only independent-library and design-services provider to have verified DSP Group cores with deep-submicron technologies. The company is making the OakDSPCore and PineDSPCore immediately available to its OEM customers as foundry-portable hard cores.

The company said Aspec customers can now design system-on-chip products for maximum performance and silicon cost efficiency, while having foundry flexibility through the company's SureFlow customer-owned tooling (COT) design flow.

Aspec customers can have their 0.35- and 0.25-micron SOC designs fabricated by foundry partners Chartered, Hyundai, IBM, LG Semicon, Mitsubishi, National, Samsung, Sanyo Electric, TSMC or UMC.

The OakDSPCore and PineDSPCore are both 16-bit general-purpose, low-power, low-voltage and high-speed DSP cores targeting speech/audio processing, telecommunications, digital-cellular and embedded-control applications.

Verisity Ltd. (Mountain View, Calif.) has signed a joint marketing agreement with Denali Software Inc. (Palo Alto, Calif.) to provide customers with a seamless flow that integrates Denali's memory-model tools with Verisity's Specman functional-verification environment.

"We believe that automatic testbench generation and data-driven verification are the two most exciting technologies in system verification," said Sanjay Srivastava, president and chief executive officer at Denali. "We believe in the next two years or so that just about all system verification will be built around these technologies."

Srivastava said both companies noticed that three or four of their mutual customers had gone to the trouble of integrating the two tools on their own, so the two companies took the next step and developed an integration.

The companies said the agreement lets system-on-chip designers generate memories using Denali's Memory Modeler that also run with Specman through either the Verilog programming language interface (PLI) or C interface.

Phoenix Technologies Ltd. (San Jose) has licensed its USB function core to Asahi Kasei Microsystems Co. Ltd.

Asahi Kasei said the core will initially be implemented in an IC that interfaces a microphone to a host PC through the USB. The Phoenix Technologies USB solution contains synthesizable cores for USB Host, USB Function and USB Hub, as well as a USB Test Environment in Verilog and VHDL.

Phoenix also offers a USB Peripheral Development Board, USB Hub evaluation board, USB Platform Management-PlugWorks and USB Firmware and Driver Support.

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