Posted: 11/02/98

How low can you go? Avant! Corp. (Fremont, Calif.) and Taiwan Semiconductor Manufacturing Corp. (TSMC) last week announced what the companies claim to be the "first complete tool integration" with foundry-specific libraries for 0.18-micron design.

Avant! will develop and support Libra-Visa libraries optimized for TSMC's 0.18-micron process, thus expanding TSMC's existing 0.25-micron physical libraries. Further, Avant! will provide TSMC customers with its "SinglePass" deep-submicron design system. Libra-Visa libraries will be integrated into SinglePass, which includes the Apollo placement-and-routing tools, Hercules hierarchical physical verification, Saturn optimization, Planet floor planning, Mars design analysis and Star-RC 3-D extraction. Avant!'s Silicon Blueprint Program will provide TSMC silicon-calibrated models and files for the tools.

"For the first time, customers will have access to integrated front-end and back-end tools and silicon-proven libraries at the 0.18-micron level," said Vic Kulkarni, general manager of Avant!'s library unit. The Libra-Visa libraries include standard cells, I/Os and memory compilers characterized according to foundry-specific design rules.

Another library development is coming from Virtual Silicon Technology (Sunnyvale, Calif.), which is announcing 0.25-micron working silicon that demonstrates the manufacturability of that company's Diplomat-25 libraries using the 0.25-micron process from Taiwan-based United Microelectronics Corp. (UMC). The companies are hailing the test chip as a major milestone in their multiyear joint-marketing and technology-development agreement.

VST claims that the test-chip measurements have shown correct functionality with timing correlation below 5 percent between simulations and silicon. I/O functionality and slew-rate control perform as in simulations. The I/Os reportedly provide 3.3-V drive using just a single-oxide process.

VST's Diplomat-25 for UMC Group is available now, and evaluation kits are free. A variety of licensing agreements are offered.

Mentor Graphics Corp. (Wilsonville, Ore.) has added to its extensive collection of soft cores with the M8051Warp microcontroller core, claimed to be the fastest 8051 implementation in the world. The core will be licensed to customers developing systems-on-chip for the consumer and communications markets.

The core was created in-house at Mentor's intellectual-property (IP) division. The team used its knowledge of the 8051 architecture to create a core that claims a sixfold improvement over the original 8051 devices. Ian Mackintosh, director of engineering at the IP division, said the core is capable of speeds that go up to 100 MHz in deep-submicron implementations. It is binary-compatible with the 8051 8-bit instruction set, and can run up to 50 million instructions/second. The core is available in synthesizable VHDL and Verilog.

Free Subscription to EE Times First Name Last Name Company Name Title Email address   Click here for your Free Subscription to EETimes Europe