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Yellow Pages of IP-design expands; audio core debuts
The multimillion gate counts afforded by advances in semiconductor technology have opened the door to an era of system-on-a-chip design, which EE Times intends to track closely. Before engineers get to the point where they can quickly locate and license the functions they need and easily plug them into their designs, the electronics community first must surmount a host of hurdles surrounding the creation, sales, protection and delivery of intellectual property. This column is dedicated to tracking advances that address those issues.
Coverage of this emerging sea change in design reuse will spill beyond these lines to other stories throughout the paper, on the EE Times Web site and beyond. For example, EE Times is cosponsoring the IP'98 conference slated for the Santa Clara Convention Center on March 23-24. Also, we're working with conference cosponsor Miller Freeman to create a comprehensive news feed on the IP'98 Web site that will provide the latest in the intellectual property arena. We hope you'll find this column valuable and invite feedback.
Design and Reuse S.A.R.L. (D&R; Grenoble, France) is pushing the boundaries of the emerging intellectual-property market with enhancements to its Internet-based virtual-component location service. The prequalification form it is developing for cores listed on its electronic catalog could become the foundation for a standard way to describe intellectual properties.
The free "Yellow Pages" service, established last year, lists more than 1,100 components as well as their 72 suppliers. The listing is intended to provide additional value through prequalification of the cores.
D&R has so far attracted a dozen sponsors for its Web site, including ARM, Alcatel, Sagantec, SGS-Thomson Microelectronics and Siemens.
The IP prequalification catalog aims to answer some of the most frequently asked questions about core customization options. It will provide a mix of description data relevant to the VSI alliance "socketization" standards, plus data covering simulation and testing, verification (including prototyping), patent issues, references regarding prior use and the business model of the core's provider.
The IP prequalification format will be made available in the first 1998 Catalog release. D&R intends to submit the prequalification format to the VSI alliance, for consideration as a standard, just as it previously submitted its taxonomy format as a candidate for standardization of the IP summary description format (ISDF).
Jacobs Pineda Inc. (Oakland, Calif.) has a new core that targets designers who wish to integrate 3-D audio into their digital systems. The JPI J5 Audio Processor Core processes both the TruSurround and SRS 3-D algorithms developed by SRS Labs Inc. (Santa Ana, Calif.).
The J5 boasts 20-bit audio quality and has been precertified for 32 kHz, 44.1 kHz and 48 kHz. When fabricated in 0.35-micron CMOS, the core occupies less than 0.5 sq. mm of silicon. Access the company at www.jacobspineda.com.
Edited by Michael Santarini, with contributions by Peter Clarke in London.
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