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  • Posted: April 20, 1998

    DSP-core research widens; Synopsys targets modeling

    Queen's University in Belfast has opened a specialized center within the department of electrical and electronic engineering to speed research advances to the industry. DSiP (DSP Silicon Intellectual Property) Laboratories aims "to bridge the gap between the more speculative and curiosity-driven research activities of the academic laboratory and the requirements of the marketplace,." said the center's director, John McCanny.

    McCanny also serves as chief technology officer of Integrated Silicon Systems Ltd. (ISS), a Queen's University spin-off company that licenses DSP cores to industry. The mathematically based hierarchical capture of circuit blocks in hardware-description languages is the basis of its parameterized DSP core offerings. McCanny said more recent work on fast Fourier transform implementations, discrete cosine transformations and wavelet-based compression could also be commercialized.

    At DSiP, McCanny will direct the research of 15 to 20 postgraduate and postdoctoral researchers with a view to moving that research out into the commercial sector. An advisory board, which will oversee the center's activities, will draw members from Analog Devices, ISS, Nortel, VLSI Technology and Xilinx, as well as representatives from government research laboratories.

    "DSiP Laboratories will work closely with local industry to create an infrastructure and skills base which is directly relevant to the needs of modern high-technology industry," McCanny said.




    Synopsys Inc. (Mountain View, Calif.) claims that its Desktop ModelFactory will make it safe and economical for core providers to create and distribute industry-standard models of cores directly to end users. According to the company, the new release addresses core security by delivering models in compiled binary format, making it impossible for an unauthorized person to recover the source code.

    The tool incorporates model-template generators, model debug tools, interface code and utilities, and support for both C and Verilog. According to the company, C support starts with models created using industry-standard GNU C or C++ compiler tools. Verilog is supported through the Synopsys Verilog Model Compiler (VMC), the same technology used in Synopsys' VCS Verilog simulator.

    The Desktop ModelFactory enhances these user-supplied models with Logic Modeling portability, distribution and support utilities. Dynamic loading, instance-based memory management, model isolation, versioning and logging as well as standard authorization calls are included.

    In addition, the company said, the tool supports a variety of simulation interface standards, including the Logic Modeling Swift interface, which links models to more than 30 simulation environments; Verilog PLI; and emerging cycle-based interfaces. The interface architecture allows extension to future interface standards.

    Synopsys said the tool has been used by IBM, Motorola, NEC and Siemens to create and distribute models to users. Prices go from $30,000 to $250,000.

    Edited by Michael Santarini, with a contribution by Peter Clarke

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