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  • Boon for small European firms?;
    Xilinx/CoreEL aim cores at networking, ATM


    A European research project led by Iprias Ltd. (Grenoble, France) is looking to help small companies exploit their intellectual property and trade it as cores suitable for integration in larger ASICs or as software algorithms.

    The Assistech project, launched just last month, is organized under the Open Microprocessor systems Initiative of the European Union's Esprit program. It includes Circuits Multi-Projects, a silicon prototyping service, and EDA company Dolphin Integration SA, both based in Grenoble. Iprias specializes in intellectual-property consulting.

    "We believe there are 15,000 European SMEs [small and medium-size enterprises] in the electronics area," said Tony Dent, a partner within Iprias. "During the course of the 15-month project, we expect to be in contact with about 250 of them and work with about 15."

    Dent said Assitech's aim is to cover a broad range of applications and technologies in both software and hardware and to publish the results so that as many small companies as possible will have an example to learn from.

    Xilinx Inc. (San Jose, Calif.) and CoreEL Microsystems (Fremont, Calif.) have announced five cores targeting networking and asynchronous transfer mode (ATM) uses.

    These are the first ATM-specific cores optimized for Xilinx's XC4000 and Spartan series of FPGAs. They include the 50-MHz Utopia slave interface, a cell delineator, cell assembler, and the CRC10 and CRC32 error-correction cores. All are available directly from CoreEL.

    The company said the Utopia slave conforms to the ATM Forum's Utopia2 spec and supports 8- and 16-bit operation at 25, 33 and 50 MHz. Separate transmit and receive blocks can be used alone or together in an FPGA to form a transceiver. Both blocks use the Xilinx distributed SelectRAM feature to implement on-chip, rate-matching FIFOs.

    The cell-delineation and cell-assembler cores perform the functions required in the transmit and receive streams of the transmission-convergence sublayer of an ATM physical-layer processor, said the company.

    The cores ship as Xilinx-optimized net-lists. The Utopia Slave costs $18,000; the cell delineator and cell assembler are jointly priced at $12,000, and the CRC10 and CRC32 are jointly priced at $7,000.

    The Virtual Chips group of Phoenix Technologies Ltd. (San Jose, Calif.) has licensed to Kawasaki LSI U.S.A. and Aox Inc its VirtualLink 1394a synthesizable cores. The cores will be used in serial-link and system-level ICs.

    IEEE 1394 is a new interconnect that can transfer data at 400 Mbits/second. It provides a means to connect devices such as DVD-ROM, CD-ROM, printers, video cameras and mass-storage media to home-entertainment systems and PCs.

    Phoenix says the VirtualLink 1394a architecture provides a register-driven interface that makes it simple to link the 1394a core to any type of design. The core also includes architectural accommodations for future 1394 specs such as 1394b, which is slated to support gigabit rates and long-distance transfers.

    Edited by Michael Santarini, with contributions from Peter Clarke.

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