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Posted: March 10, 1998

DSP Group Inc. has inserted a new synthesizable core to its portfolio that is software-compatible with its Oak DSP core, a move that the company called an interim step before it unveils its next-generation Palm DSP core.

"We've adjusted our road map to satisfy market demands and what our licensees are telling us," said Irving Gold, vice president of DSP core technologies for DSP Group (Santa Clara, Calif.). "The Palm is a quantum leap beyond what we have today. What we see in the market is a large hole between generations."

The new Teak core will include a deeper pipeline to enable speeds up to 130-MHz on a 0.25-micron process, and have an internal power draw of 250 mW/Mip. The architecture features a dual multiply accumulate (MAC) that will provide 260 Mips performance, a double-word memory read/write instruction, fast-interrupts context switching and an extended program-addressing space. DSP Group will also offer a slimmed-down version of the Teak, dubbed TeakLite, that will use only one MAC.

Gold said Teak is well-suited to handle voice processing for the new CDMA cellular standard recently ratified in Europe. "The new standard will require additional voice coders; as you improve quality you need better compression characteristics and it requires additional processing power," he said.

Moreover, Teak is fully synthesizable and should be easier for licensees to port to their individual processes technologies, a process that Gold said was "not trivial" with its Oak hard macro. The trade-off of using a so-called soft core means that performance could vary as much as 10 percent among the licensees, he said.

Gold said DSP Group has design teams working in parallel for its Teak and forthcoming Palm cores, and that the company has not changed its plans to introduce Palm by the summer of 1999. Palm will be offered in 16-, 20- and 24-bit versions.

The core will be offered in both Verilog and VHDL formats to NEC customers. According to Sapien (Fremont, Calif.), the core is fully USB-1.0 compliant and supports a full range of USB end points.

The USB controller has previously been used in a Windows CE processor manufactured by NEC.

Under the agreement, UMC will endorse Virtual Silicon's Diplomat-25 design rules, and the companies will jointly develop test chips to check reliability data and timing correlation and to verify cores.

Designers using UMC's 0.25-micron process will able to embed large cores into their designs using the Diplomat-25 standard-cell libraries.

Edited by Michael Santarini, with a contribution from Anthony Cataldo.