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Posted: March 16, 1998

Microprocessor-core developer Advanced RISC Machines Ltd. (ARM; Cambridge, England) has announced three variants of its ARM7TDMI Thumb core tailored for portable and multimedia applications.

The ARM710T, 720T and 740T have been designed to support real-time and virtual-memory operating systems running on ARM-based ASICs aimed at mobile, multimedia and embedded applications. Each core does that by providing a combination of an 8-kbyte unified cache, memory-management unit, write buffer and other features.

The 710T supports full virtual memory management and is aimed at personal-digital-assistant and Internet applications based on such operating systems as pSOS from Integrated Systems Inc. and EPOC32 from Psion Software plc. The ARM720T adds to all those features specific support for the Windows CE operating system (see Jan. 26, page 18).

The ARM740T combines the cache with a write buffer and memory-protection unit, making it suitable for embedded applications, such as set-top-boxes and modems, that don't require full memory management, the company said. The cache includes a lock-down feature to prevent areas of memory from being overwritten.

All three cores can run at up to about 50 MHz, at which they score 45 Mips (Dhrystone 2.1). Power consumption is rated at 16 mW to 18 mW.

The Thumb is a version of the ARM7 32-bit RISC CPU architecture designed to work with instructions stored in 16-bit format and expanded on the fly to 32 bits. The approach sacrifices processing performance for an approximate 30 percent saving in code size, the use of 16-bit-wide memory banks and related power-consumption savings.

The program, which comes in CD-ROM format for PCs, includes 30 Xilinx-specific cores, including FIR filters, adders, accumulators and multipliers. Core developers and customers can combine those cores to create larger functions or can implement them directly into Xilinx 4k or Spartan-series FPGAs.

According to the company, the cores are developed and optimized using the Xilinx Smart-IP technology, which leverages the Xilinx architectural features, such as lookup tables, distributed RAM and segmented routing, and floor-planning information, such as logic mapping and relative location constraints.

CORE Generator can also be used as a cataloging and delivery system for future Xilinx cores. Users will be able to download new cores from http://www.xilinx.com/products/logicore/coregen as they become available.

According to Xilinx, customers have been using CORE Generator as an alpha tool for some time, but it is now being made available to all interested parties. The software is offered from Xilinx free.

Edited by Michael Santarini, with a contribution by Peter Clarke.