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 Can road maps remedy the design productivity gap?
F
or a few days at the end of February, the city of romance became the city of formal verification, design reuse and systems-level design, as Paris hosted the Design Automation and Test Europe conference and exhibition.
And it was at that conference that I came across a road map prepared by the European Design and Automation Association. The road map--in reality, four A3 sheets with a time axis running to 2002--attempts to chart the trends and requirements of systems-level design. Europe, with its high proportion of vertically integrated companies and with systems expertise in telecommunications and other application areas, should be able to offer a useful perspective. Indeed, engineers from companies like Alcatel, Bull, Italtel, Philips and Siemens all contributed to the EDAA road map. Industry road maps are all the rage now. The EDA Industry Council's a two-year old EDA road map is being updated, and Dataquest Inc.'s Gary Smith said the Electronic Industry Association of Japan will be coming out with its own EDA road map at the end of the month. The Semiconductor Industry Association's semiconductor technology road map--a detailed expansion and extrapolation of Moore's Law--is probably one of the best-known road maps in the industry. Perhaps the problem is that semiconductor makers pay attention to the SIA road map. They see that the industry going to 0.18-micron minimum geometries, 1.25-GHz clock frequencies and 20-million to 100-million transistor ICs in 1999. For "the industry" they read "the competitio n" and so they ramp up the R&D to try to get ahead of the SIA road map. The result is that progress in monolithic integration is speeding up. Meanwhile EDA road maps have either not been available or not had nearly as much attention paid to them. So perhaps it should be no surprise that progress in taking EDA to higher levels of abstraction has been slow--and that the design-productivity gap is opening up. Of course other factors are probably more important. Without minimizing the challenges ahead in manufacturing, the SIA road map looks like a multilane highway compared with the potholes and uncertainties along any EDA road map. Semiconductor manufacturing is quantitative and based on hard science. EDA software is notoriously difficult to quantify and therefore both its current capability and progress are difficult to measure. These EDA road maps, or hopefully one unified EDA road map, can document the challenges and direct the research that will take us up to systems-level design. De fining the problem is always the first step to finding a solution.
Peter Clarke, based in London, is European Correspondent forEE Times.
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