You can probably blame me for the sorry state of reporting about microprocessor bugs. Ever since I broke the 1994 story of the floating-point flaw in Intel's Pentium, every Matt Drudge wannabe has tried to take even the most insignificant bug ("EXTINT won't deassert interrupt on alternate Tuesdays") and inflate it to stock-busting proportions ("Deep Tuesday bug destroys Pentium interrupts").

So when reports surfaced of a glitch in Xeon, Intel's first Slot 2 processor, I was skeptical. Sure enough, there was a bug. Predictably, it was minor. Also predictable were the events surrounding the news, which was first disclosed by a Silicon Valley newspaper. Afraid of missing a big scoop, the dozen-odd services that track Intel rushed their reports to the Web.

Intel initially declined to comment, then wisely decided to come clean with word they'd sent a fix out to their OEMs.

The news services duly posted Intel's admission, and went off in search of the next purported glitch ("Jerry Sanders admits K6 can't divide by zero"). But no one bothered to close the technical loop.

It turns out that the Xeon bug is officially known as erratum 37, "In-order queue wraparound before implicit write-back completes may cause infinite DBSY# assertion."

The problem crops up only when there's a high rate of code fetches from the L2 cache as well as an externally generated read hitting a modified line, followed by seven zero-length external transactions, followed by another external transaction on a modified line. Got that?

If all these things happen and the moon is full, then the writeback data isn't transferred to memory and further bus transactions are blocked by a full in-order queue. Intel is fixing the bug via a patch to Xeon's microcode.

While erratum 37 is small potatoes, another glitch buried in Intel's bug list might raise some eyebrows. It's called "Misprediction in program flow may cause unexpected instruction execution."

Say what? This is the first time I've seen a possible soft spot in Intel's dynamic instruction-execution technology. Wrong program-flow predictions are normally flushed out of the instruction pointer. But there's apparently a window when instructions might not be wrung from the mispredicted path, "causing execution of operations not in the desired program flow."

The upshot, Intel said, "may range from no effect to unpredictable application or operating-system failure."

I couldn't get Intel to comment on whether they've corrected this flaw. But since their bug list said, "It is possible for BIOS code to contain a workaround for this erratum," a fix is likely in the works.