It's time for another edition of "Making Book on Merced," the industry pastime where we attempt to uncover the closely held architectural details of Intel's upcoming 64-bit microprocessor.

First, some ground rules. Intel's engineers would like to talk, but they're not allowed to ("We could tell you, but then we'd have to kill you"). Hewlett-Packard's engineers would really like to talk-they're afraid the world isn't aware of their major contributions-but they're really not allowed to. Management will talk, but it won't tell you anything you don't already know.

Such stumbling blocks aside, a broad picture is emerging. Merced will rely on cutting-edge software optimization to dole out instructions to its many parallel execution units.

Intel has talked about two techniques: predication, which removes unnecessary branches, and speculation, which masks memory latency. But additional methods-including limited data speculation, "prepare to branch" and register windowing-will also play a role.

As for the hardware, even though Merced will be more parallel than any previous mainstream microprocessor (it can handle many instructions simultaneously), we hear that the chip itself isn't any harder to build than traditional RISC or CISC designs. This despite the fact that individual tasks like placing-and-routing the floating-point units are turning out to be tough work.

At the top level, Merced's designers are focusing their efforts on making it easier to gang together multiple functional units. Their objective is to create a machine with as much usable parallelism as possible.

From where I sit, a big question is where HP fits in. Early wisdom held that HP helped define the instruction set but hasn't worked on Merced itself. Yet I hear persistent rumblings that HP engineers are playing big roles in building the processor.

When will the chip be ready? Intel initially said Merced would debut in mid-1999. In May, it pushed that target back to mid-2000. When I contacted Intel, officials stressed that the date stands. I would not suggest otherwise, since (back in February) when I gingerly mentioned the "possibility" that the original 1999 deadline might slip, I was strongly challenged.

Personally, I think pressure from Wall Street-the folks who think a microprocessor is "a thumbnail-sized electronic traffic cop"-has warped everyone's perspective.

The work Intel's engineers are doing is too important to be rushed by non-technical considerations. Here's a heretical thought: Intel should forget about hitting a specific date and, instead, ship Merced when it's good and ready.