If a microprocessor can't cut it in a multiprocessing system, it can't really cut it at all. Unfortunately, myths and ignorance about multiprocessing are spreading throughout the technical community.

From where I sit, the fault lies not with chip suppliers such as Intel, but with engineers too fearful to own up to the fact that most of us are pretty much clueless when it comes to designing two- and four-way systems. Scarier still, many of us don't know what we don't know.

The biggest challenge is bus contention. Deadlock situations, which happen when four CPUs fight for control of the same bus, are a frightening but regular occurrence. Managing memory, so that each processor has assurances that it is accessing a correct copy of data, is also critical.

In addition, software that can stress multiprocessing systems is in short supply. Though lots of programs are touted as "multithreaded," few actually are.

The truth is, debugging a multiprocessing system is about the toughest thing any engineer can do. Problems that crop up are so intermittent, so hard to diagnose and so tough to solve that it's almost impossible to get a solid handle on them.

Yet microprocessor vendors tend to sweep these tough issues under the rug. In the PC world, everybody likes to pretend that computers can be designed by the numbers. It ain't so.

Engineers shouldn't have to learn the fine points about bus contention on the Internet's equivalent of the street corner. Yet if you go to most public documentation, you'll find only cursory information.

Unfortunately, things could get worse before they get better. Multiprocessing will become pervasive within a year, so many engineers will find themselves designing two- and four-processor systems for the first time.

Already, two-way machines are becoming a common sight. And four-way configurations won't be unusual as we move into the next generation of microprocessors.

For example, Intel is touting its new Xeon as a foundation for four-way multiprocessing. (This thrust is continuing despite an early glitch in a companion core-logic chip set which affected four-way operation.)

As Intel readies Merced, the competitive battleground will heat up. For example, Compaq will be working on a next-generation Alpha that will support 64-way systems.

According to Sun, its upcoming UltraSparc III, "is highly scalable, enabling systems using up to 1,000-plus processors." (Your mileage may vary.) Hewlett-Packard's final PA-RISC family, the PA-8500, will also be a contender.