UMC (Hsinchu, Taiwan) and Extreme DA (Santa Clara, CA) said the flows aim to reduce design uncertainty and predict design performance and yield by analyzing timing behavior in the presence of process variations. The first flow, based on the Extreme DA's Gold statistical analysis suite, has been applied to a test-chip at UMC's 65-nm process node, the companies said.

The two parties said their collaboration focuses on 65-nm design flow development, including the characterization of UMC libraries for global and mismatch variations to analyze the effects. It also includes the location based on-chip variation model construction for improved accuracy of variation analysis as well as the variation-aware extraction and timing analysis on a 65-nm test chip.

In an interview with EE Times Europe, Graham Bell, marketing counsel for Extreme DA, stated: "The deliverable of this collaboration is a technical node that allows UMC and Extreme DA joint customers to take these statistical models and use them with their tools. This collaboration will continue to smaller process nodes."

This collaboration extends similar collaborative efforts for the 90-nm node, back in July 2006.