The relentless pursuit of scaling over the last 40 years, in accordance with the famed postulate known as Moore's Law, continues to be an aggressive goal.

Yet the buzz at the Semicon West equipment show here this week (July 15-17) suggests the time has come to rethink what is scalable and examine other ways of adding value to semiconductor devices.

Although leading IC makers Intel and IBM remain committed to Moore's Law (Intel in part out of respect for founder Gordon Moore's scaling formula), both are starting to address its limits. And those limits are not just technical, they are economic as well.

At Semicon West, where the relentless market pressures facing chip makers are measured in the progress of tools able to refine physical transistor gate lengths down to 22 nanometers, the Greek chorus of industry gurus sounded a warning: In chasing after ever smaller and denser devices, it might just not be practical to go on scaling for the sake of scaling.

"It's been an economic issue all along," said keynoter Bernie Meyerson, an IBM fellow and CTO of the IBM Systems and Technology Group.

"Moore's Law stipulates that you need to double the density of chips every 12 to 18 months [for scaling purposes]; that's an economic, not a technical issue."

The recipe for scaling is expensive and geometries are approaching single atoms, which won't scale. Those facts are forcing the industry to look "beyond CMOS," simply because "the result of further scaling is more power consumption, more costly [devices] and slower operation," said Meyerson.

So tool vendors are starting to pursue other schemes. As part of the drive to add value to chips, new tools are emerging for such technologies as through-silicon via (TSV) for three-dimensional packages.

Microelectromechanical systems (MEMS) are also being considered. "Compound, TSV and MEMS are evolving technologies for mass-production quantity tools, driven by the consumer electronics business," said Jerry Cutini, president and CEO of Aziza Technology.