Although Celoxica, previously known as Embedded Solutions Ltd., has offered a Handel-C compiler since June 1997, Celoxica describes DK1 as its first "commercial" tool.

With DK1 the Handel-C compiler adds a simulator and debugger, greatly enhancing the usefulness of the hardware compilation approach, Celoxica said. It has also added VHDL output to enhance the ability of Handel-C to be used with other EDA tools and legacy hardware intellectual property.

Handel-C enables hardware or software engineers to use Handel-C to write out algorithms targeted for migration to hardware. The compiler then produces automatically equivalent data path and control logic expressed in the form of an EDIF netlist while coping with the parallel nature of combinatorial logic. This EDIF output can then be taken as the input to physical design to produce Xilinx Inc. or Altera Corp. FPGAs — or, alternatively, as input to an ASIC design system.

The simulator and debugger are said to address past problems with the Handel-C compiler. When used as a standalone tool, critics said, it was not possible either to test a design before physical design or, if the design failed to work or worked poorly, to determine why.

"The simulator works at the functional level. It takes the Handel-C . . . down to a C-executable form," said Mat Newman, senior vice president of corporate development at Celoxica (Abingdon, England). "It supports the ability to have input files to stimulate the simulator and to record output files. It can also be used [to] drive other simulators."

He said "automatic test vector generation is not part of the simulator. But we tend to view testing the way you would view software testing. You can do profiling of code coverage although that's not a complete set. The debugger — to the user — it will look very much like C++ Visual Basic."

No code limit

Newman said there is no practical limit to how much Handel-C code the DK1 is asked to simulate and compile, with good practice and downstream place and route tools determining a modular hierarchical approach long before DK1 chokes. "We've been doing 2 million-gate designs without choking the simulator," he said.

Jon Treanor, president and chief executive officer of Celoxica, said: "We aim to reduce the time it takes to produce new applications in hardware from years to weeks and days. DK1 will open up the silicon design industry by leveraging widely available software programming skills and targeting off-the-shelf silicon so that the barriers that prevent many companies from design innovation are torn down. We believe this could invigorate the industry by creating a new competitive landscape."

The DK1 design suite and Handel-C compiler before it, have been heavily targeted at FPGA and reconfigurable design. Celoxica announced last December that it was working with FPGA vendor Xilinx and real-time operating system vendor Wind River Systems Inc.

"Celoxica's Handel-C language is a powerful tool. Consequently, DK1 design suite was an obvious choice to adopt this language to complement RadioScape's own Communication Virtual Machine (CVM) design flow and tool set that has been designed for the rapid development of communications technology," said Peter Florence, managing director of RadioScape Ltd. (London), a developer of digital audio broadcast and communications systems.

"As an example, using DK1 it took us just three weeks to take a 6-Mbit/second multirate soft Viterbi decoder from mathematical model to implementation, which under our CVM we were then able to seamlessly integrate into the Universal Mobile Telecommunications System stack development. Without the DK1/CVM tool set, such a development could easily have taken months, not weeks."

DK1 developers can also take advantage of prototyping boards provided by Celoxica. Intended for testing Handel-C algorithms and code in hardware, the RC1000 series evaluation boards are design-ready printed-circuit boards pre-loaded with Virtex series FPGAs from Xilinx.

The DK1 design suite runs under the Windows 98, 2000 or NT4.0 operating systems and supports FPGAs from Xilinx and Altera. Pricing for DK1 starts at $65,000 for a three-year license, not including maintenance. It is due to begin shipping worldwide in March 2001. The RC1000 boards are available, priced at $9,000. They include Virtex series FPGAs from Xilinx and 8 Mbytes of RAM.