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Road to DAC: Complete Conference Coverage
NEWS FROM DAC
July 31, 2006
DESIGN TOOLS: Averant drills down into formal verification
July 31, 2006
SIMULATION: Acquisition to bear 'trimode' fruit
July 31, 2006
Variability fingered as next design pothole
July 31, 2006
July 28, 2006
43rd DAC : The week that was
July 28, 2006
Verification: Automation no substitute for thought, Foster says
July 28, 2006
Variable-precision fixed/floating-point formats for Verilog
July 27, 2006
July 27, 2006
Cadence challenged on IC power standards effort
July 27, 2006
Multimedia to spur architectural renaissance
July 27, 2006
Agilent poised to acquire Xpedion
July 27, 2006
DAC keynoter: think of software as part of manufacturing
July 27, 2006
Synopsys in definitive agreement to acquire litho sim vendor
July 27, 2006
SystemC synthesis tool adds improved C++ support
July 27, 2006
CoWare releases SystemC modeling library source code
July 27, 2006
Synopsys donates SVA checkers to Accellera
July 27, 2006
Denali, Spirit Consortium in collaboration
July 27, 2006
IC designers share variability concerns, solutions
July 27, 2006
July 26, 2006
Details of ST's Nomadik processor disclosed
July 26, 2006
Leading EDA users cite nanometer IC challenges
July 26, 2006
EE Times DAC insider: Cadence iffy about DAC 2007?
July 26, 2006
Thermal effects not an immediate concern, says TI exec
July 26, 2006
ESL panelists call for TLM standards
July 26, 2006
July 25, 2006
Spotty support stymies broader acceptance of System Verilog, users say
July 25, 2006
Should IP adopt a services business model?
July 25, 2006
Synplicity's revenue, profit up slightly year-to-year
July 25, 2006
IP encryption brings trust, panelists say
July 25, 2006
Firms partner on standard statistical analysis library format
July 25, 2006
Nokia plows a path to ESL adoption
July 25, 2006
Woman in engineering seek to balance efforts, results
July 25, 2006
Costello: VCs see EDA as 'dead space'
July 25, 2006
Design tool integration gets expanded view
July 25, 2006
July 24, 2006
'Monopolistic' EDA industry needs course correction, critics say
July 24, 2006
PDF rolls process characterization product
July 24, 2006
DFM requires new business models, CTOs say
July 24, 2006
Imperas tops analyst Smith's watch list
July 24, 2006
Link for Modelsim 2 adds direct Verilog support
July 24, 2006
ASIC design down, but not out
July 24, 2006
Formal verification tool promises finer control
July 24, 2006
Cadence, Mentor spar in high-speed realm
July 24, 2006
EDA lags on delivering value through innovation
July 24, 2006
EDA is fully engaged on today's design issues
July 24, 2006
EDA, IP vendors seek statistical library format
July 24, 2006
By the Numbers: Exploding the myths of chip design
July 24, 2006
EDA users decry tools
July 24, 2006
Designing without a net: Restricted design rules challenge DFM's role
July 24, 2006
Synopsys rolls 'entitled' yield results tool
July 24, 2006
Spice-ing up accuracy, speed
July 24, 2006
ARM demos generator tool for virtual prototyping
July 24, 2006
ARM upgrades interconnect tools and Fabric IP
July 24, 2006
EE Times DAC insider: SSTA adoption slow?
July 24, 2006
Restrictive design rules could curb EDA growth, analyst says
July 24, 2006
Dataquest to EDA: 'It's the software, stupid'
July 24, 2006
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PRE-DAC NEWS
Magma offers 'tri-mode' circuit simulator
July 23, 2006
Blaze DFM says new MO release up to 5X faster
July 21, 2006
Tanner EDA speeds up tool suite
July 21, 2006
Fujitsu offers statistical timing environment
July 21, 2006
NEC targets C-based design tool market
July 21, 2006
Tensilica to engage DAC attendees with charity work
July 21, 2006
Synplicity advances DSP solution
July 21, 2006
Low power IC design initiative to target EDA companies
July 21, 2006
Infineon's sales up, posts loss
July 21, 2006
Deal enables MOSIS to offer XAP 16-bit processors
July 21, 2006
Startup Athena tops Cooley's DAC 'must see' list
July 21, 2006
Laker tool claims 10x boost in a/ms design productivity
July 20, 2006
Startups developing ES flow with self-timed interconnect
July 20, 2006
Si2 announces board of directors
July 20, 2006
Integrated tool analyzes power, thermal effects
July 20, 2006
Atmel adopts tools for DSP from Target
July 20, 2006
Magma, Brion partner on litho modeling environment
July 19, 2006
Celoxica adds floating-point toolkit to IP portfolio
July 19, 2006
EDA startup launches QA tools
July 19, 2006
Magma offers statistical timing analysis methodology
July 18, 2006
Time constraint software eases IC design
July 18, 2006
Power optimization tool claims further reduction
July 18, 2006
Aprio, Ponte team on litho-aware yield analysis
July 18, 2006
SoftJin rolls building block for programmable platform tools
July 18, 2006
GreenSocs offers SystemC framework
July 18, 2006
OSCI adds 11 associate members
July 18, 2006
DAC names student design contest winners
July 17, 2006
Initiative aims to unify embedded system design flow
July 17, 2006
Starc is first Spirit Consortium associate member
July 17, 2006
Matsushita backs analog/RF tool startup
July 17, 2006
Arteris, CoWare agree to work TLM together
July 17, 2006
Self-timed interconnect solution supports AXI bus protocol
July 17, 2006
Startup Liga promises to rev simulation
July 17, 2006
Startup takes dual IP, ESL role
July 17, 2006
Magma rolls integrated tool flow for DFM
July 17, 2006
Sierra adds routing, partners with Mentor
July 17, 2006
'Silicon aware' tool tackles power at RTL
July 17, 2006
What's hot at DAC
July 17, 2006
Tools tag 65-, 45-nm ICs
July 17, 2006
Event lineup heavy on ESL
July 17, 2006
EDA upstart rolls 'litho driven' router
July 17, 2006
AWR to integrate, sell Helic EDA software
July 17, 2006
10 join Liberty tech advisory board
July 16, 2006
Package-aware design tool integrated with Talus
July 14, 2006
Startup rolls enhanced coprocessor synthesis tool
July 14, 2006
DFM startup targets 'hot spot' detection, repair
July 12, 2006
Startup preps 'system physical prototype'
July 10, 2006
Startups integrate ESL synthesis, power estimation
July 6, 2006
43rd DAC to feature 44 new exhibitors
July 5, 2006
DFM startup aims for worst cases
July 3, 2006
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