The evolving design flow will enable designs that are released to manufacturing with design correctable litho issues, either removed or considered, in addition to the current yield optimizations offered by Ponte.

The joint solution from Aprio (Santa Clara, Calif.) and Ponte (Mountain View, Calif.) is being implemented using OpenAccess, the interoperability standard for EDA tool integration from Silicon Integration Initiative Inc. It will allow SoC designers to improve the yield of their designs, without the need to learn complex lithography processing steps, the companies said.

Aprio's approach takes aim at the inadequate communication that exists today between integrated circuit design and manufacturing teams. By partnering with key suppliers in the design-to-manufacturing chain, Aprio plans to enable improvements in chip predictability, performance and yield with minimal impact to current design and manufacturing work flows.