Magma (Santa Clara, Calif.) said it has worked closely with TSMC for more than a year to address timing and yield problems caused by process variation.

"TSMC works hard to identify and qualify tools and methodologies that address emerging design challenges and help designers achieve silicon success," said Ed Wan, TSMC's senior director of design service marketing, in a statement. "TSMC partnered with Magma to develop the methodology, which includes statistical library support, extraction for interconnect variation, statistical analysis, and optimization, to effectively address timing closure issues in 65-nm and below technologies."

According to Magma, while traditional static timing analysis approaches do not scale to the 65-nm node, Quartz SSTA supplements traditional sign-off methods with statistical static timing analysis, using variables rather than fixed delays to produce a statistical distribution, rather than best-case and worst-case models.

Quartz SSTA is said to account for process and metal variation, automatically identifying clocks, paths, cells and metal layers that are sensitive to variation. Utilizing the unified data model architecture, Quartz SSTA then works seamlessly in conjunction with Magma's IC implementation system to automatically fix timing problems that result from variation, according to Magma.