According to Celoxica (Oxfordshire, England), the IEEE 754-compliant libraries support single, double and custom precision floating-point. They are parameterizable for area, latency and performance optimization across all leading programmable logic architectures and can be tuned to specific application requirements, the company said.

The IP behind the floating-point toolkit was developed in conjunction with the Institute of Information Theory and Automation (UTIA) in the Czech Republic and represents the first milestone between the two entities since they signed a multi-year research agreement last month, Celoxica said.

"This important addition to our IP portfolio addresses customer need in both the DSP and HPC space for a very high-performance, fully parameterizable and platform-independent floating-point capability," said Chris Sullivan, director of strategic marketing for Celoxica, in a statement. "We can readily tune and re-tune the libraries to meet changing architectures and specifications, and the current implementation not only provides industry-beating performance and flexibility, but the libraries themselves demonstrate the extreme circuit optimization that can be achieved using the DK Design Suite."

Parallel designs using the floating-point core modules can deliver up to 50 giga floating-point operations per second and support the processing requirements in real-time imaging and signal processing applications, according to Celoxica. The toolkit is being deployed into high-performance computing application areas such as the automated trading of equities and related financial derivatives, oil and gas exploration and embedded applications including audio and video DSP filtering, Celoxica said.

The toolkit supports pipelined add, subtract, multiply, divide and square-root operations, and conversions to and from 32-bit fixed point, according to the company.

The add module has a five stage pipeline for all precisions and the multiply module is provided with user configurable pipelines to support the embedded multiplier and DSP blocks in modern FPGA devices, Celoxica said. The custom precisions provided in the toolkit are optimized for designers who want to take maximum advantage of embedded FPGA resources such as DSP blocks and make optimum use of existing gate counts, according to the company.

For simulation and verification the floating-point toolkit supports processor-in-the-loop and hardware-in-the-loop simulation, Celoxica said. Bit-exact Simulink blocks for all arithmetic operations supported by the library are included and test vectors can be created in Simulink models and debugged in Celoxica's DK Design Suite, the company said.