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Startups developing ES flow with self-timed interconnect
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EE Times


SAN FRANCISCO — Startups Silistix and CoWare Inc. are collaborating on the development of solutions for SystemC electronic system level (ESL) system-on-chip (SoC) development using Silistix's Chain self-timed interconnect fabric, the companies said Thursday (July 20).

The companies said the would integrate Silistix's Chainworks tool suite with CoWare Platform Architect and CoWare Model Designer to allow designers to assemble and simulate an SoC platform incorporating processors and peripherals from the CoWare Model Library, connected with Silistix's Chain fabric.

"The increasing complexity of SoCs is pushing the design community to incorporate ESL tools into the design flow, allowing them to identify and resolve system problems earlier in the design cycle," said David Fritz, Silistix CEO, in a statement. "Working with a leader like CoWare allows our common customers to take advantage of a superior set of ESL design tools while reaping the benefits of self-timed interconnect in their chips."

Silistix said it would be demonstrating the results of the collaborative effort between the two companies here next week at the Design Automation Conference.






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