SAN FRANCISCO — The Milos meta routing optimization system from startup Athena Design Systems tops EDA gadfly and EDA tool user site Deepchip.com moderator John Cooley's list of things to see at the 43rd Design Automation Conference (DAC), which kicks off at the Moscone Convention Center here Monday (July 24).
In a posting published Thursday (July 20), Cooley notes that Milos, introduced this past March, offers users the ability to analysis and optimize on the fly on multiple constraints. Cooley also says he knows that Toshiba is using Milos and that Magma Design Automation Inc. is offering a similar tool, Talus.
No. 2 on Cooley's list of things to see is Sierra Design Automation Inc.'s Olympus OptRoute litho-aware router. Last year, Cooley ranked Sierra's Pinnacle 2.0 physical design tool as the No. 1 thing to see at the 42nd DAC.
Third place on the Cooley list is a tie between statistical static timing analysis (SSTA) tools from startup Extreme DA Corp., Synopsys Inc., Magma, IBM Corp. and Altos Design Automation. Cooley says SSTA's promise lies not so much in the design-for-manufacturability (DFM) marketing hype as much as the technology's ability to provide more margin than "plain olde" static timing analysis.
Among Cooley's other "must sees" at DAC:
Cooley says he has it on good authority that Synopsys will be showing for DFM "Project Athena," a standalone design yield analysis tool that can be used in tool flows from Magma, Mentor Graphics Corp. and Cadence Design Systems Inc.
Cooley counts Apache Design Solutions' Sahara-PTE, introduced Thursday, as a must see. The tool is an integrated electro-thermal tool for analyzing system-on-chip (SoC) temperature's impact on leakage, timing, reliability and voltage drop.
According to Cooley, rumor has it that Cadence will be hawking the new Cadence Precision Router developed by the company's Catena incubator.
For low power, Cooley suggests a peak at tools from gate optimization rivals Zenasis Technologies Inc. and Prolific Inc., as well as Golden Gate Technology Inc., Azuro Inc. and Sequence Design. Cooley also suggests visiting ChipVision Inc and ArchPro Design Automation Inc. for "front-endish" RTL architectural power reduction.
Cooley notes that he's asked all of the EDA vendors to bring their show giveaways to the United Microelectronics Corp. (UMC) booth (No. 3,339) Monday at 4:30.
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