Speaking to a packed hotel ballroom as one of four analysts to present at the 18th annual Gartner Dataquest Executive Briefing here Sunday evening (July 23), Olsson said that some percentage of 32-nm designs will certainly use RDRs, also known as structured regular silicon. If that percentage is greater than 40 percent, Olsson said, growth in the market for design-for-manufacturability (DFM) tools will be significantly reduced.

Adopting RDRs will enable designers to use less expensive layout tools and decrease use of DFM and yield analysis tools, Olsson said.

The concept behind RDR, which is rapidly emerging from universities and IDM research labs, is to restrict the layouts that designers produce in order to enhance manufacturability. For example, RDRs may set limitations on gate pitch and orientation, or even mandate that all gate-forming polysilicon features have the same orientation, width and pitch.

Earlier this month, Gartner's chief EDA analyst, Gary Smith, said the semiconductor could see widespread adoption RDRs at the 32-nm node as a way to ensure acceptable yield and return on investment. Smith said the concept has been proven out at 45-nm by IBM, and that other major chip makers, including Intel Corp., Advanced Micro Devices Inc. and Toshiba Corp. are currently developing RDR design.

Olsson said RDRs will enable designers to use less expensive EDA tools, lowering the entry bar for chip design. RDRs will also require bridging the "disconnect" between chip makers and EDA companies, she said.

"EDA and semiconductor companies will have to work together more closely in the future," Olsson said.

Olsson said the 32-nm node will likely be a "high impact" process node that will also cause a shakeout of chip makers. The cost of doing business at the 32- and 22-nm nodes will drive players out of manufacturing, she said. Small fabless companies will also have difficulty making the transition to 32- and 22-nm, she said.

Olsson noted that, for all the "hoopla" about the most advanced, leading-edge 65-nm technologies, even the most advanced companies are still generating the bulk of their revenue from 90- and even 130-nm designs. To illustrate her point, Olsson said that Broadcom Corp. won't be doing 65-nm manufacturing until 2007 and that only 17 percent of manufacturing at No. 1 foundry Taiwan Semiconductor Manufacturing Co. (TSMC) is at 90-nm, with the bulk being at more mature nodes.

"The real bread and butter paying all of the bills is still being shipped at 130- and 90-nm," she said.

Olsson said Gartner expects 450-nm fabs to be coming on line in about 2020, but that very few companies will actually take that step. She described 450-nm as a very expensive investment that will be in the hands of very few companies.