SAN FRANCISCO — An unprecedented explosion of new technologies and companies is poised to make its impact on attendees at this week's Design Automation Conference (DAC). Revitalized by the system-on-a-chip design crisis, the EDA industry is playing every angle to bring desperately needed technology to market.

Most likely to grab top billing will be reconfigurable-computing-based verification tools, notably Quickturn Design Systems' Mercury Design Verification System, which will promise "continuous verification" from behavioral through gate-level design. Mercury's debut will cap off a month of precedent-setting verification announcements from such startups as Axis, 0-In Design Automation and Verplex, as well as such giants as Cadence, Mentor Graphics and Synopsys.

Old and new vendors alike are challenging existing paradigms in logical and physical design. Much of the new technology will come from more 20 EDA startups that will announce themselves or their first products at DAC.

In IC physical design, startups Everest, Sycon, Moscape and Stanza are offering new technology in place-and-route, full-custom layout, and physical extraction and verification. Avant! Corp. (Fremont, Calif.) will roll out shape-based routing, crosstalk analysis and enhanced links between technology CAD (TCAD) and EDA.

Radically new approaches to design include "block-level" logical and physical design from Aristo, analog behavioral modeling from Anasift, "formal synthesis" from Derivation Systems, partitioning and design planning from Tera Systems and algorithm-based design from Frontier Design.

Why all the activity, at a time when recession looms over the semiconductor industry? Most observers say the reason is that EDA technology has fallen dangerously behind silicon-process capability, and chip manufacturers are finding that new tools and methodologies are essential for million-gate, deep-submicron designs.

'Vibrant industry'
"EDA is a vibrant industry, at the same time that the semiconductor and systems industries are going through major changes," said Aart de Geus, chairman of Synopsys Inc. (Mountain View, Calif.) and newly elected chairman of the Electronic Design Automation Companies (EDAC). "The importance of EDA will definitely increase during the next five years."

Many observers said major EDA vendors haven't done enough to meet next-generation design challenges. The growing market need, the availability of venture capital and a large pool of seasoned EDA veterans have prompted "spontaneous generation" of startups, said analyst Ron Collett, president of Collett International (Santa Clara, Calif.).

"Companies who want to stay in the chip-design market are realizing they need to retool, and there's a price to be paid for that," said Collett. But that doesn't necessarily translate into a big jump in EDA industry growth, since it will be offset in part by a falloff in Japanese revenues.

Analyst Gary Smith at Dataquest Inc. (San Jose,Calif.) has slightly downgraded his previous estimates and now sees 15.3 percent EDA software growth in 1998, compared with 16.3 percent in 1997. Smith was expecting a disappointing DAC a few months ago, because the "silicon virtual prototyping" tools essential for system-on-chip design were nowhere in sight. Then Smith encountered startups, such as Aristo and Tera Systems, that are "really changing the competitive situation."

Lucent Technologies Bell Labs (Holmdel, N.J.) is "designing more hardware products than we've ever designed, and we're probably buying tools at a higher rate than ever before," said Tom Pennino, head of CAD engineering at Lucent. Startups, Pennino said, are "where the EDA industry is getting its technology."

The big EDA vendors aren't providing a lot of technology innovation, said Erach Desai, analyst at Soundview Financial Group (Stamford, Conn.). He said Cadence is focusing on electronics implementation, Synopsys and Avant! are in a "technology consolidation" phase, and Mentor is in "perpetual recovery." Thus, "technology innovation for EDA is likely to emerge from focused startups."

But de Geus strongly disputed the claim that big EDA vendors can't innovate. "Synopsys has invested in an enormous amount of R&D and has continually been able to come out with state-of-the-art technology," he said.

At this year's DAC, Cadence is announcing its entry into the formal-verification market, Synopsys is linking hardware/software coverification to cycle-based simulation and emulation, Mentor is entering the transistor-level timing market, and Avant! is announcing a broad range of new TCAD and IC design products.

Then there's the Quickturn Mercury system, which Dataquest's Smith believes will be the "top introduction" of the conference, partially because of its hardware/software-codesign potential. Quickturn (San Jose), in fact, is betting its future on reconfigurable computing and is exploring a range of applications both inside and outside of EDA.

For logic verification, Mercury promises a single environment that can accelerate event-driven, behavioral Verilog simulation, as well as enable vastly improved register-transfer level (RTL) and gate-level emulation. Aimed at "mainstream" users rather than high-end-processor designers, it comes in a compact package promising ease of use and low cost.

In theory, Mercury could replace simulation and emulation as we know them today — and in fact it will replace Quickturn's System Realizer emulators over time, said Naeem Zafar, vice-president of marketing at Quickturn. Just two restrictions appear to stand in the way — slow compile times and an inability to handle RTL and gate-level timing — and Quickturn is working on both.

With support from C-language models to gates, Mercury offers a variety of verification modes, extending from conceptual design through regression testing and system validation. That suggests a sea change in today's verification environments, with their collections of disparate tools.

"Today you end up switching horses to get the job done," Zafar said. "This has the potential to be the one system, under a common user interface, that can offer continuous verification from concept to the physical system."

The basic components of Mercury include SimServer, a mixed-level simulation engine comprised of RISC CPUs; an FPGA-based emulation engine with a new architecture; the FullVision source-level debugging environment; a three-level memory solution; and a new way of modeling intellectual property (IP), with announced support from five major IP providers.

Mercury runs event-driven Verilog behavioral simulation orders of magnitude faster than workstation-based solutions. With a new IMPX (inherent multiplexed partial crossbar) architecture, it promises faster but simpler RTL and gate-level emulation, with full visibility into internal nodes without recompiling. Mercury also promises IP vendors flexibility and security for modeling cores.

"We believe we have the world's largest reconfigurable computer," said Zafar, "and we believe there's no reason it shouldn't be attacking other complex problems." He said Quickturn is actively researching such problems as place-and-route, electrical-rule checking and design-rule checking.

Bypassing von Neumann
Mercury represents reconfigurable computing because of its ability to map an algorithm directly into hardware. By creating extremely parallel, appli-cation-specific computational resources and providing an arbitrarily wide bandwidth to memory, reconfigurable computing products bypass the sequential von Neumann approach and promise speeds that leave the fastest supercomputers in the dust.

"The essence of reconfigurable computing is to map part or all of an algorithm into FPGAs," said Mike Butts, emulation architect at Quickturn. "The most productive applications have FPGAs tightly coupled to conventional processors."

With Mercury, gate- and RTL-level constructs — essentially, anything synthesizable — are mapped into FPGA hardware, where they run at emulation speeds. RTL net-lists are mapped using Quickturn's existing HDL-ICE software. Behavioral code, including C-language models and test benches, goes to the SimServer hardware, which includes 66-MHz PowerPC 403GCX processors.

With SimServer's massively parallel architecture, speed increases are dramatic. Zafar said the company has taken Verilog simulations that ran at 185 Hz on a workstation and reached speeds of 80 kHz with SimServer.

FPGA-based emulation is still faster than the SimServer CPUs. Mercury offers capacity ranging up to 10 million gates. Each million-gate module includes two PowerPCs and 74 FPGAs. Most previous reconfigurable computing systems, in contrast, have contained just a few FPGAs.

SimServer is an option, selectable by purchasing the software that "turns on" the PowerPCs. Without SimServer, there's no behavioral event-driven simulation, but users still have a re-architected emulator that supports the FullVision debug environment, Quickturn's IP modeling methodology, improved memory resources and faster emulation and compilation speeds than System Realizer.

The IP modeling options offered by Mercury include IP-Tiles, which are pre-emulated, routed and protected cores, and IP-Flexiblox, which are binary models that users can mix with their net-lists before partitioning and routing for emulation. Advanced RISC Machines (ARM), Integrated Intellectual Property (I2P), Virtual Chips, Sand Microsystems and NEC have announced support for Quickturn's IP modeling. Quickturn has precertified soft cores from I2P, Sand and Virtual Chips, and it is working with ARM to make hard cores accessible to Mercury via an adapter board.

Mercury's three-layer memory support includes FPGA internal memory, static-RAM chips on emulation boards, and specialized boards for large-scale memory. "In reconfigurable computing, it's vital to get memory bandwidth," said Butts.

Prior art?
As far-reaching as Mercury is, Axis Systems (Sunnyvale, Calif.) stole some of Quickturn's thunder with its late-May announcement of its Re-Configurable Computing (RCC) engine. But Axis has no equivalent of Quickturn's SimServer CPUs, nor does it offer full emulation capabilities, as does Mercury. On the other hand, Axis has a simpler and probably less-expensive product — eight PCI-based boards inside a Sun workstation, instead of a separate chassis.

With prices starting at $395,000 for 500,000 gates, Mercury does not come cheaply. But at 2 million gates, Zafar said, the price drops to around 51 cents per gate, compared with more than $1 a gate for System Realizer. Further, Quickturn will sell "replicants,"ghj starting at $245,000, that don't include logic analysis or compilation for new designs.

SimServer starts at $85,000. Mercury is shipping in limited quantities now.

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