SUNNYVALE, Calif. — Fujitsu Laboratories of America has developed a formal equivalency checker and is looking for business partners to help market it. The tool, Assure, is being featured this week at Fujitsu's booth at the 35th Design Automation Conference.

Assure is said to verify circuits with hundreds of thousands of gates in one hour or less and to offer an open architecture with a variety of formal verification algorithms. It offers three interface modes: command line, graphical user interface and batch. It includes a range of verification constraint options and uses automatic correspondence-matching to reduce run times.

Sunl Wadhwa, a member of Fujitsu's research staff, said Assure is not yet for sale on the open market but has been used extensively inside Fujitsu on production designs. "I think the best thing about the tool is the integrated research and development," he said. "The latest results from the research group are incorporated into the tool."

Further information is available from Fujitsu via e-mail.