LEUVEN, Belgium — Frontier Design Inc. next week will introduce software written to bridge a significant divide in electronic design: the one between systems architects, who use the C language, and hardware designers, who use hardware-description languages and synthesis tools.

Frontier's tools can be used to automate the conversion of high-level processing algorithms written in the general-purpose C language to bit-accurate register-transfer-level descriptions. The overall name of the tool family is A/RT, which stands for Algorithm-to-Register Transfer.

The first two products in the tool suite are A/RT Library, for the development of fixed-point C descriptions of algorithms, and A/RT Builder, for the direct conversion of fixed-point C algorithms to VHDL or Verilog.

"The key to the functionality and performance of any system is the algorithmic intellectual property that goes into it," said Herman Beke, president and chief executive officer of Frontier Design (Leuven, Belgium). "Typically designers develop floating-point algorithms in C or C++ and implement them by compiling the code on a standard DSP processor."

However, these processors are expensive, they consume a lot of power and they must be surrounded by peripherals that take up a lot of board real estate, Beke said. In addition, implementing the algorithms in software can result in unacceptable performance.

"For all of these reasons, most designs will usually be migrated to an ASIC or a performance-optimized silicon IP core either before or after a first successful introduction into the market," Beke said. "The problem is that very few system designers are familiar with the hardware-description languages [HDLs] that are used to implement designs in silicon. As a result, there is a gap between the algorithm and the RT-level description that is very difficult to bridge. The A/RT tool suite bridges the gap between algorithmic IP and reusable silicon IP."

The A/RT Library provides the fixed-point operators and data types needed to refine the C description to achieve a bit-accurate representation of the algorithm.

Implementing C-based algorithms in an ASIC or FPGA almost always requires that the algorithms work with a fixed-point processor, thereby mandating fixed-point data representations and arithmetic.

However, the C language doesn't really support fixed-point arithmetic, so designers end up writing a lot of ad hoc code in a trial-and-error process to achieve the desired result. This approach is both time-consuming and error-prone.

The A/RT Library consists of a set of C++ classes that encapsulate the characteristics of fixed-point data types and operators, giving designers an easy, elegant and robust way to translate C-based algorithms to hardware implementations that are based on fixed-point data representations.

A/RT Library does not require a C++ environment to compile, link or execute code that references it. For designers who are familiar with C, using A/RT Library is no different than using standard C data types or operators, the company said. The underlying fixed-point classes automatically model the intended behavior in a bit-precise way, including overflow and quantization effects.

A/RT Builder automatically converts the fixed-point C algorithm to a register-transfer-level VHDL or Verilog description that is ready for synthesis into a net-list for ASIC or FPGA implementation. A/RT Builder is specifically optimized for use with Synopsys' Design Compiler and Exemplar's Leonardo and Galileo products.

During compilation from C to the HDL, the designer can use compiler directives or pragmas to control the target architecture.

A/RT Builder will be available for HP and Sun workstations in September. It is priced at $20,000. The A/RT Builder license includes a license for A/RT Library.

Frontier will be available at booth 62 at next week's Design Automation Conference.