SAN JOSE, Calif. — To help EDA tool developers get tools to market quickly, EDA intellectual-property vendor Interra Inc. is releasing the Concorde customizable RTL synthesis engine and the Net-list Object Model (NOM), a front-end for Verilog, VHDL and EDIF structural designs. The new technologies are targeted at EDA companies and internal CAD-development groups.

Ajoy Bose, Interra's president and chief executive officer, said Concorde can function as a high-level input to FPGA tools, give quick estimation of ASIC gate counts or act as an RTL front end for a formal-verification tool.

"Trying to meet time-to-market, a lot of EDA companies get burned by trying to create a quick RTL synthesis module to create a front-end for their product," he said. "They run into massive quality problems and compliance issues. That is why we offer Concorde."

The company said Concorde's command-line options control every aspect of its behavior. It features resource sharing, state re-encoding and a set of optimization algorithms and supports generic and user-defined libraries for technology mapping.

App hooks
The architecture has built-in hooks for easy integration into targeted application programs. Users can access multiple layers of a design in memory through the tool's procedural interface.

The technology is tuned for high speed and large capacity. It compiles up to 100,000 Verilog or VHDL gates per minute on an UltraSparc workstation. The technology accepts the synthesizable subsets of both Verilog and VHDL.

The NOM, Bose said, is an extensible, language-independent, in-memory data structure with an API. It helps provide a unified view of any net-list description while hiding language-specific details.

The tool's API provides intuitive functions to access and dynamically modify the in-memory data structures; elaborated connectivity information is stored hierarchically, said Bose.

Interra said NOM can be extended, allowing users to build on their tools' existing capabilities to meet specific requirements from a net-list representation. The technology supports Verilog, VHDL and EDIF 2 0 0 read-and-write, with binary dump and restore capabilities. It's optimized for memory usage and run-time performance.

Concorde and NOM technologies are available for SunOS, Solaris, HP and Windows NT platforms. Pricing varies depending on license type and whether design services are required. The company also makes source code available to customers but on a non-exclusive basis.