WILSONVILLE, Ore. — Mentor Graphics Corp. will enter the dynamic timing-analysis market at the Design Automation Conference (booth 1108) with Mach TA, a transistor-level tool billed as an "accelerated simulation engine." Mach TA has speed, accuracy and capacity advantages over existing tools such as Synopsys Inc.'s TimeMill, according to Mentor.

Although Mentor has long offered transistor-level simulation with its L-Sim tool, Mach TA is a much-more-focused point tool with newer technology. It claims to handle net-lists with up to 10 million transistors and to run up to 1,000 times faster than Spice with an accuracy trade-off of just a few percent.

Most timing-analysis tools in recent years have been static tools. Dynamic tools are slower and require user-input stimulus, but they're also more accurate. Daniel Payne, product marketing manager at Mentor, noted that dynamic tools are seeing a "resurgence" for deep-submicron design because they can handle coupling capacitance.

"On any kind of structure where you've got long interconnect runs that have significant coupling, dynamic analysis is the only technique that shows accurate performance," he said.

Mach TA offers both batch and interactive analysis. In interactive mode, users can set break points, stop the simulation and query results. Batch mode is generally used for regression testing.

The product accepts Spice net-lists in either Star-HSpice or Eldo format. The net-list can be created by any schematic capture system or IC parasitic extraction tool. Results from Mach TA are displayed with a waveform viewer or as text.

Key to Mach TA's performance capabilities is its automatic partitioning. The program divides circuit elements into partitions that perform a single function. It then runs event-driven simulation between the partitions and uses a time-step algorithm within the partitions.

"We build a matrix for each partition and solve it using some new techniques based on graph theory," Payne said. "It's not classic Spice where you build one huge matrix for the entire circuit."

Mach TA creates table-based models to speed simulation. The current version is aimed at MOS circuits and handles both digital and mixed-signal circuits.

Payne said that the best speed metric for products such as Mach TA is "transistor vectors per CPU minute." He said that on a Sparc 30 workstation, Mach TA can run 15 million transistor vectors per CPU minute, which is the equivalent of a 1 million-transistor net-list with 15 vectors.

Mach TA is available for Unix platforms immediately; it will be available for Windows NT in the third quarter. For either platform, pricing is $75,000 for a node-locked license and $93,750 for a floating license.