Posted: 3:00 p.m., EDT, 6/2/98
Startups seek conference limelight
By Richard Goering
SAN FRANCISCO An unusually large number of EDA startup companies will make their first public appearances at this year's Design Automation Conference. While solutions range from system-level to transistor-level design, most are addressing the challenges of deep submicron ICs and systems-on-silicon.
Startups are blossoming because of the growing inability of present-day design tools to fully take advantage of new silicon processes. Small companies appear to be moving more rapidly than the large EDA vendors in a number of areas. Much of the new technology on display at this year's DAC will come from startup companies.
System-level design is necessary to tackle large projects, and CoWare Inc. (booth 65) is coming to DAC with one of the most complete high-level hardware/software codesign solutions available. Frontier Design (booth 62) is offering technology that can convert C-language algorithms to bit-accurate, RTL code. Similarly, CompiLogic Corp. (booth 67) is offering C-to-Verilog translation tools that provide an alternative to behavioral synthesis.
Derivation Systems (booth 1542) has a new approach to design with a "formal-synthesis" tool that promises correct-by-construction decomposition of a system-level specification. Temento Systems (booth 94) will show Diatem, a system-level "design-and-test" platform.
Plans expand
Design planning is becoming a critical tool for deep-submicron ICs. Tera Systems (booth 145) brings new meaning to the term with technology that includes partitioning and RTL-delay estimation. Aristo Technology (booth 80) offers both "block-level" design planning and final routing. Sandstrom Engineering (booth 2546) sells a utility that checks VHDL before going into synthesis.
New logic-verification technology includes reconfigurable-computing-based hardware from Axis Systems (booth 1640), formal equivalency checking from Verplex Systems (booth 151), and Linux and Unix-based Verilog cycle simulation from Tau Simulation (booth 11).
Simpod Inc. (booth 2534) is a first-time DAC exhibitor with its IC verification pod hardware. 0-In Design Automation (booth 1434) had a small booth last year, but is now announcing its first product, a verification tool that synthesizes checkers that run with simulation.
New IC physical-design companies at DAC include Everest Design Automation (booth 2538), which offers a gridless place-and-route tool. Stanza Systems (booth 19) offers a full-custom layout editor and design-rule checker. Moscape Inc. (booth 96) is pioneering "assertion-based" analysis tools that check signal-integrity problems before and during layout.
IC physical-library startups at DAC include NurLogic Design (booth 16) and Virtual Silicon Technology (booth 1354).
Finally, Anasift Technology Inc. (booth 12) offers new analog behavioral-modeling technology and Transcendent Design (booth 86) provides a link to the mechanical world with cabling design tools.
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