SAN FRANCISCO — Though its startling, Bryan Preas of Xerox Palo Alto Research Center said others share the opinion of EDA he voiced at the 35th Design Automation Conference. "Lots of people are expecting a design revolution soon," Preas said.

Ron Rohrer of Intersouth Partners (Research Triangle Park, N.C.) was more colorful in his assessment. "Think of the EDA industry as three dinosaurs roaming the Earth and looking at all the little animals beneath them," he said. "If it's tasty they'll eat it. If it's not they'll defecate on it. Then a meteor hits the Earth and the dinosaurs die. Where's the meteor?"

And during the same panel discussion at DAC last week, Alberto Sangiovanni-Vincentelli, professor of electrical engineering and computer science at the University of California at Berkeley, wandered back and forth across the stage in animated style declaiming the virtue of high-level specification and design analysis at the system level.

The three experts, speaking at the final session of DAC, provided an overview of 35 years of design automation and looked forward to what might soon happen.

Preas described the past as a series of revolutions based either on advances in technology or on changes in methodology. He said EDA is "hitting a wall" and needs a revolutionary new approach to provide the ability to design even more complex systems.

While the change from transistor to integrated circuit manufacture was a technology revolution, Preas called the transition from simple ICs to very large scale integration a methodology revolution based on the move to cell-based design. "Transistor design abstracted away the polygons, whereas the cells abstracted away the internals of transistors," he said.

Rohrer said that moves to higher levels of abstraction were accompanied by less physical freedom at the lower levels of abstraction. "The move to synthesis from VHDL and Verilog goes with a more highly constrained layout in the ASIC physical design style," Rohrer said. "The higher the abstraction, the less physical freedom."

Rohrer then outlined three routes by which layout freedom might be constrained to enable a move to higher levels of abstraction: standards committees; a breakthrough creating a de facto standard; and the formalization of present design practice.

Standards committees were summarily dismissed, and Rohrer said he would believe in single-chip breakthroughs when he sees a jumper wire or trace added to an IC to accommodate a late engineering change order. And he suggested that a formalization of current practice might make it possible for multiple chips to be included in single packages that Rohrer called system-in-a-packages.

While characterizing the past, Preas listed "fracture planes" that he felt could be broken down by current EDA methods.

"Synthesis optimizes the wrong thing," he said. Interconnect delay is the dominant factor in the timing, area and power consumption of deep-submicron chips, while conventional synthesis optimizes the gates between the interconnections, which increasingly are less significant, he said.

"Sequential optimization algorithms don't work," said Preas, who pointed out that a series of optimizations are increasingly likely to bounce a design between different places in the design space without converging.

Finally, "digital and cell abstractions fail because of too many complex analog effects," he said.

Stating he did not pretend to know what lay ahead, Preas forecast a return to the days when IC designers had to be electrical engineers rather than computer scientists. He also expects interconnect-centric design and a further stratification of the design process, if and when IC integrators are introduced as a specialization in between system and IC designers.

Separately, Sangiovanni-Vincentelli described the necessity and inevitability of moving design to a higher level of abstraction that would includes software as well as hardware. Such an approach would be analogous to previous design styles, but would include a change in the granularity of design abstraction: "The equivalent of the NAND gate is the microprocessor," he said.

Sangiovanni-Vincentelli drew on the experience of UC Berkeley working for automotive component maker Magneti-Morelli, wherein students reduced the transport control system of an automobile to a state machine with seven states. This example illustrates the power of working at a high level, Sangiovanni-Vincentelli said. Adding weight to the predictions of Preas and Rohrer, he said that some companies are attempting to work at higher levels of abstraction, but that handcrafted IC design is also increasing. "There's a dichotomy because the tools are not capturing the detail below," he said.

What will or what should happen next? Academic Sangiovanni-Vincentelli said more money should go into university research, while Rohrer predicted that research would happen within the semiconductor companies.

Returning to the dinosaur theme, Rohrer said that semiconductor companies will set up internal EDA research and will "despise it, as they did in the past. Then those people will leave to form the next generation of dinosaurs."