SAN FRANCISCO — Making good on its promise to ease silicon intellectual-property (IP) exchange, the Virtual Socket Interface (VSI) alliance will release its first public specifications at the Design Automation Conference, scheduled for June 15-19 in San Francisco.

The implementation/verification specification sets forth data formats to be used with hard IP blocks, while the mixed-signal specification lists deliverables for analog and mixed-signal blocks.

Comprising over 150 systems, semiconductor, IP and EDA vendors, VSI has been working for more than two years to build standards that allow chip designers to mix IP from different sources on one chip. Blocks that conform to these standards are called Virtual Components (VCs). VSI's mission is widely viewed as an essential enabler for system-on-a-chip design.

The initial specifications carry no great surprises or divisive controversies, although they've taken somewhat longer than expected to release. The use of several proprietary data formats caused delays in the implementation/verification specification. But both of the new specifications have passed membership review, and will be posted on VSI's Web site.