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We'll be posting stories throughout June on announcements and activities coming out of the 35th Design Automation Conference, scheduled for June 15-19 in San Francisco. Stop back to find the latest news.

Monday, June 29, 1998

  • Behavioral breakthrough promised by Meropa (3:00 p.m., EDT, 6/29/98)
  • X-Tek shows graphical modeling approach (3:00 p.m., EDT, 6/29/98)

    Friday, June 26, 1998

  • Conference breaks attendance records (9:00 p.m., EDT, 6/25/98)

    Wednesday, June 24, 1998

  • EDA entrepreneurs debate the proper path to success (9:00 p.m., EDT, 6/23/98)

    Tuesday, June 23, 1998

  • DAC RF design tools get a push (3:00 p.m., EDT, 6/23/98)
  • EDA industry seen on verge of a revolution (9:00 p.m., EDT, 6/22/98)

    Monday, June 22, 1998

  • InterHDL offers RTL planning tools (3:00 p.m., EDT, 6/22/98)
  • Which will improve design productivity more-tools or methodology? (3:00 p.m., EDT, 6/22/98)
  • New telecom services keep vendors on their toes (11:45 p.m., EDT, 6/19/98)

    Friday, June 19, 1998

  • Paltry funding hurts Web-based electronic design (11:00 a.m., EDT, 6/19/98)

    Thursday, June 18, 1998

  • Semi-formal tools lend a hand to verification (6:00 p.m., EDT, 6/18/98)
  • Unix/NT interoperability task force details its work (6:00 p.m., EDT, 6/18/98)
  • Reporter's Notebook: What you missed at DAC (11:00 a.m., EDT, 6/18/98)
  • Silicon vendors try resource-saving alternatives (11:00 a.m., EDT, 6/18/98)

    Wednesday, June 17, 1998

  • EDA vendors plan for the nanometer era (6:00 p.m., EDT, 6/17/98)
  • Synopsys, Quickturn team to link coverification, emulation (6:00 p.m., EDT, 6/17/98)
  • Motorola, IBM give Mentor's IP strategy a boost (6:00 p.m., EDT, 6/17/98)
  • NT? 'No Thanks,' say pro-Linux rank-and-file (6:00 p.m., EDT, 6/17/98)
  • Hardware/software codesign remains elusive (6:00 p.m., EDT, 6/17/98)
  • High-level analog tools for digital designers are still a dream (6:00 p.m., EDT, 6/17/98)
  • Grenoble startup preps system-level design tools (6:00 p.m., EDT, 6/17/98)
  • Formalized Design makes big claims for secret technology (11:00 a.m., EDT, 6/17/98)
  • Metric measures complexity of a design task (11:00 a.m., EDT, 6/17/98)
  • Mentor launches three-pronged design-reuse campaign (11:00 a.m., EDT, 6/17/98)
  • VSI readies some plugs for wide system-chip holes (11:00 a.m., EDT, 6/17/98)
  • Synopsys and Mentor cross-license tools for test purposes (11:00 a.m., EDT, 6/17/98)
  • Duet brings OPC to libraries (11:00 a.m., EDT, 6/17/98)
  • Analogy, Microcosm partner on MEMS modeling (11:00 a.m., EDT, 6/17/98)
  • Fujitsu builds formal verification tool (11:00 a.m., EDT, 6/17/98)

    Tuesday, June 16, 1998

  • Spencer says productivity improvements will wane without industry attention (6:00 p.m., EDT, 6/16/98)
  • Lovell rivets EDAC awards presentation (6:00 p.m., EDT, 6/16/98)
  • ARM goes soft on RISC cores (6:00 p.m., EDT, 6/16/98)
  • Altera opens IP unit (6:00 p.m., EDT, 6/16/98)
  • OLA gets a plug from Cadence (11:00 a.m., EDT, 6/16/98)

    Monday, June 15, 1998

  • EDA hits a 0.25-micron wall (6:00 p.m., EDT, 6/15/98)
  • Women execs urged to take risks in EDA careers (6:00 p.m., EDT, 6/15/98)
  • Optem creates 3D 'Inspector' (6:00 p.m., EDT, 6/15/98)
  • DSP core vendor adds JPEG encoders, opens U.S. office (6:00 p.m., EDT, 6/15/98)
  • Aristo signs block partners (6:00 p.m., EDT, 6/15/98)
  • EDA renaissance blooms at DAC (11:00 a.m., EDT, 6/15/98)
  • EDTN network adds D&R's virtual component directory (11:00 a.m., EDT, 6/15/98)
  • Sycon rolls custom IC tools (11:00 a.m., EDT, 6/15/98)
  • OrCAD adds Exemplar synthesis to Express environment (11:00 a.m., EDT, 6/15/98)
  • Prototype now supports Altera architecture (11:00 a.m., EDT, 6/15/98)
  • QuestLink establishes online EDA index (11:00 a.m., EDT, 6/15/98)
  • OEA's tools get speed, accuracy upgrade (11:00 a.m., EDT, 6/15/98)
  • CAD-to-CAM interface gains major backers (11:00 a.m., EDT, 6/15/98)
  • ASIC Council ready to demo Open Library API (11:00 a.m., EDT, 6/15/98)
  • Avant!'s shape-based router features full-chip editing abilities (10:00 a.m., EDT, 6/15/98)
  • Gambit tool automatically removes antenna violations (11:45 p.m., EDT, 6/12/98)
  • Nu Thena adds cosimulation and library support to Foresight (11:45 p.m., EDT, 6/12/98)

    Friday, June 12, 1998

  • HP takes EDA apps to 64-bit Unix (3:00 p.m., EDT, 6/12/98)
  • Mentor and Synopsys cooperate on "reuse" manual (3:00 p.m., EDT, 6/12/98)

    Monday, June 8, 1998

  • Verification breakthroughs light up the conference (3:00 p.m., EDT, 6/8/98)
  • Chip Express offering RTL sign-off service (3:00 p.m., EDT, 6/8/98)
  • Anasift bids to break analog bottleneck (10:00 a.m., EDT, 6/8/98)
  • Frontier tools turn C algorithms into HDLs (10:00 a.m., EDT, 6/8/98)
  • IP development tools aide characterization of embedded memories (10:00 a.m., EDT, 6/8/98)
  • Mentor speeds timing with Mach TA tool (10:00 a.m., EDT, 6/8/98)
  • Opmaxx commercializes mixed-signal BIST (10:00 a.m., EDT, 6/8/98)
  • VSI alliance set to release first specs at DAC (11:45 p.m., EDT, 6/5/98)

    Friday, June 5, 1998

  • European startup aims for system- to core-level testing (9:00 p.m., EDT, 6/4/98)

    Thursday, June 4, 1998

  • Altera to demo Quartus software for Raphael PLDs (9:00 p.m., EDT, 6/3/98)

    Wednesday, June 3, 1998

  • Startup develops IP-friendly synthesis tools (3:00 p.m., EDT, 6/3/98)
  • Incases Engineering upgrades pc-board design tools (9:00 p.m., EDT, 6/2/98)

    Tuesday, June 2, 1998

  • Startups seek conference limelight (3:00 p.m., EDT, 6/2/98)
  • DAC to showcase latest EDA developments (3:00 p.m., EDT, 6/2/98)
  • Vera tuned for coverification (9:00 p.m., EDT, 6/1/98)

    Monday, June 1, 1998

  • Startup zeroes in on tough logic bugs in verification twist (3:00 p.m., EDT, 6/1/98)
  • Virtual-component catalog prepped for online debut at DAC (3:00 p.m., EDT, 6/1/98)


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