Design Article
Circuit noise analysis and optimization, Part 3b
Reza Moghimi, Applications Engineering Manager, Analog Devices, Inc.
6/26/2009 4:30 AM EDT
An example with a real part
The op amp's process technology and design techniques affect its noise performance. Analog IC designers use internal circuit tricks to reduce the bias current of bipolar transistors using bias current cancellation. These tricks can introduce a correlated component to the current noise density specification. Figure 6 shows the noise specification for an ultra-low-noise, low-distortion op amp such as the AD8599 from Analog Devices
Figure 6: AD8599 noise specification.
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Users of these ICs can improve the AC and DC performance of their circuits if they configure them correctly. As shown in Figure 7, balancing the amplifier inputs allows noise performance to be optimized. For example, dc performance can be optimized by placing resistor R5–equal to the parallel combination of R1 and R4–from the non-inverting input to ground. This commonly used technique will cancel the input bias current of the op amp and reduce the overall dc error.
Figure 7: DC-optimized circuit
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The circuit discussed is not optimized for noise, however. In order to do this, one has to identify all noise sources and write noise equations as explained above, Equation 2. This is done in Figure 8:
Figure 8. Noise sources of circuit in Figure 7
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(Click on image to enlarge)
Pspice can be used to calculate the total noise of the circuit after NEB is found. Noise from 1 Hz to 15 kHz, shown in Figure 9.
Figure 9: Output noise of circuit in Figure 7
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How do we balance the op amp's inputs to get the best noise performance? This is shown in Figure 10 where the inputs are balanced for both AC and DC parameters. Note that the resistor values have changed, although the noise gain is the same (1001) and current noise density sees equivalent resistance when flowing out of the amplifier input pins.
Figure 10. AC and DC optimized circuit
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How is this circuit improved over the previous solution for noise? In order to answer this question, once again all noise sources are identified, and the appropriate equation is written to calculate the total noise at the output, Figure 11. Note that the contribution of balancing resistor Rb is captured in this figure and Equation 3.
Figure 11: Noise sources of circuit in Figure 10 identified
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(Click on image to enlarge)
A side-by-side comparison of the results from Figure 7 and Figure 10 is shown in the Table 2. The total output noise difference between the two configurations may not seem that large, as small resistors were used for balancing, but the difference becomes much more of a problem if larger resistors are used for R5 in Figure 7.
Table 2: Side-by-side comparison of Figure 7 and Figure 10
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Are there other easy ways to calculate the noise of a circuit aside from the two approaches presented so far? Another approach in noise calculation of a given circuit is given in an example of a popular application circuit, namely an op amp configured as buffer driving an ADC.
Using the voltage noise density graph of the Analog Devices' AD8675 (broadband noise = 2.8 nV/rt-Hz) as an example, Figure 12, break up the NEB into two regions (low frequency and high frequency). Note that the NEB for AD8675 configured as a non-inverting unity gain buffer is the op amp's unity gain bandwidth (10 MHz).
Figure 12: AD8675 noise density vs. frequency
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It was pointed out in previous articles that all op amp datasheets have a voltage noise density graph that can be used to find the low-frequency noise (p-p noise) and the corner frequency. This information and Equation 4 can be used for noise calculation at low frequencies:
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Using Equation 3 with values for Fl = 0.1 Hz, FH = 70 Hz, corner frequency FC = 25 Hz results in the low-frequency noise contribution of 40.45 nVrms, Equation 5:
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To calculate the noise over the high frequency region (over the flat region of the noise or white noise area), one can use Equation 6 and Equation 7:
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(Click on image to enlarge)
Add the noise values for the two regions in an rms fashion, Equation 8, to obtain a total noise of:
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How effective is this solution? How accurate is the approximation? How low a signal level can this circuit reliably process? This is possible to test by looking at the SNR. Equation 9:
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The low-frequency noise of the amplifier is negligible (the AD8675 has a very low corner frequency), so the total SNR of this solution can be calculated using only the white noise contribution. This solution is good for up to 20 bits. This amplifier degrades the SNR of a 16-bit ADC such as Analog Devices AD7671 (SNR = 90 dB) by very little, as shown by Equation 10:
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Conclusion
There are a number of ways to calculate the noise of a circuit; a few were shown in this article. But all of these methods should start with configuring the signal-conditioning circuitry optimally before conducting the noise analysis and noise calculation. If there is a good Pspice model available for the op amp, using Spice is the easiest approach. If not, then one of the other two approaches, using noise density graph approach or pen and paper calculation approach based on Equation 1 are the alternatives.
About the author
Reza Moghimi is an applications engineering manager for the Precision Analog Products group at Analog Devices, Inc. He holds an BSEE and MBA from San Jose State University (SJSU), CA. In addition to Analog Devices, Reza has worked for Raytheon Corp., Siliconix Inc, and Precision Monolithic Inc. (PMI). He enjoys traveling, music and soccer.
Previous parts of "Understanding Noise Optimization in Sensor Signal-Conditioning Circuits":
