Designing Operational Amplifier Oscillator Circuits for Precision Resistive and Capacitive Sensor Applications

The design of RC operational amplifier oscillators requires the use of a formal design procedure. In general, the design equations for these oscillators are not available; therefore, it is necessary to derive the design equations symbolically to select the RC components and to determine the influence of each component on the frequency of oscillation. This article describes a design procedure for two different variable oscillator circuits that you can use in precision capacitive-sensor applications. These two oscillators have an output frequency proportional to the product of two capacitors (C1*C2) and the ratio of two capacitors (C1/C2).

A block diagram of a capacitive sensor system is shown in Figure 1. Counting the number of clock pulses in a time window formed by the square-wave oscillator output of a comparator circuit gives the oscillation frequency. A digital-logic counter circuit or the Time Processing Unit (TPU) channel of a microprocessor implements the counter circuit. Using a curve-fitting routine with calibration data from the sensor over the operating range can correct for temperature effects. You can use an analog IC sensor to monitor the sensor temperature or, for very precise applications, use a second oscillator with platinum resistive-temperature-device (RTD) sensors.

It is often important for the sensor system to compute the ratio of two capacitors. Calculating the ratio of the capacitors reduces the transducer's sensitivity to dielectric errors from factors such as temperature. In other cases, such as in airdata quartz P pressure sensors, the desired measurement is equal to the ratio of two capacitances (CMEAS / CREF). Furthermore, the dual sensors are typically designed to double the CMEAS in capacitance, while CREF may vary less than one percent. Thus, the transducer's accuracy is increased if the electronic circuitry can directly detect the CMEAS / CREF ratio.

The poles of the denominator of the transfer equation, or equivalently the zeroes of the characteristic equation, determine the time-domain behavior of the system. If T(s) has all of its poles located within the left-plane, the system is stable because the corresponding terms are all exponentially decaying. In contrast, if T(s) has one pole that lies within the right half plane, the system is unstable because the corresponding term exponentially increases in amplitude. An oscillator is on the borderline between a stable and an unstable system and is formed when a pair of poles is on the imaginary axis.

If the magnitude of the loop gain is greater than one and the phase is zero, the amplitude of oscillation will increase exponentially until a factor in the system such as the supply voltage restricts the growth. In contrast, if the magnitude of the loop gain is less than one and the phase is zero, the amplitude of oscillation will exponentially decrease to zero.

Step 1: Find LG and s
The oscillation frequency is determined by finding the poles of the denominator of the transfer equation T(s), or equivalently the zeroes of the numerator N(s) of the characteristic equation s. Mason's Reduction Theorem provides a method of determining the transfer equation from a signal flow diagram. Mason's Theorem shows that it is not necessary to obtain the complete T(s) equation.

The oscillation frequency can be determined by analyzing the numerator N(s) of the s. s is found by obtaining the open loop gain (LG) by breaking the feedback loop and applying a test voltage to the circuit. Signal flow diagrams of the absolute oscillator and step 1 of the procedure are shown in Figures 7, 8 and 9. The signal-flow diagrams of the ratio oscillator and step 1 of the procedure are shown in Figures 10 and 11.

Step 2: Solve s
The second step in the procedure determines the zeroes of N(s). You can use one of several different control theory techniques, such as Bode or Nyquist stability tests, or use one of the following three methods. Examples of the application of the three different methods listed below will be provided.

Method I:
When N(s) is divided byand the remainder is solved to be equal to zero, an equation is established for the oscillation frequency . Method I is easy to implement for second- and third-order systems, but with higher-order systems the algebra can be tedious. Method I is based on factoring the characteristic equation to have a s² + ² term. For example, when a third order system can be factored in the form (s + )(s² + ²), the pole locations are at s = ± j and s = -. Figure 12 demonstrates Method I using the absolute oscillator without the inverter capacitor C4. Although the analysis of this second-order system is trivial because N(s) is already in the form of s² + ², this method can be used for higher-order circuits such as the 4^th order ratio oscillator.

Method II: Solve N(j)REAL = N(j)IMAGINARY = 0
The oscillation equation sometimes can be determined directly from the characteristic equation by substituting s = j into N(s) and arranging the N(j) into its real and imaginary parts. This method is usually not feasible for fifth-order and higher oscillators. This procedure is essentially a subset of the Routh test, because the first two rows of the Routh array will correspond to N(j)REAL and N(j)IMAGINARY. If N(s) = j = 0, the poles of the characteristic equation will be on the imaginary axis at ±j with an oscillation frequency of . Figure 13 provides a summary of the oscillation equations for 2^nd; and 3^rd order oscillators obtained using Method II. The application of Method II is shown for the 3^rd order absolute oscillator in Figure 14.

Method III: Routh Stability Test
The Routh stability criterion provides a method that determines the zeroes of the characteristic equation directly from the characteristic polynomial coefficients, without the necessity of factoring the equation. The Routh test is the preferred method to use for fourth-order and higher order oscillators. The Routh test consists of forming a coefficient array. Next, the procedure substitutes s = j for s, and the summation of the row is set to zero. If the row equation produces a nontrivial solution for , the procedure is complete and the frequency of oscillation is equal to . If the row equation does not yield an equation that can be solved for , the procedure continues with the next row in the Routh array. Usually, it is necessary only to complete the first two or three rows of the Routh array to produce an equation that can be solved for . The application of Method III is shown for the ratio oscillator in Figure 15.

Step 3: Subcircuit Design Equations
The third step in the design procedure is to form the design equations for the subcircuits formed by each operational amplifier. The oscillation equation can be simplified by selecting the Rs and Cs with the assumptions show in Figures 16 and 18. The amplifier gain and pole/zero locations for the absolute and ratio oscillator are show in Figures 17 and 19. A Bode plot of the gain response of the ratio circuit's differentiator amplifier is shown in Figure 20.

Step 4: Verify LG > 1
The final step in the procedure verifies that the loop gain is equal to or greater than one after choosing the R and C component values. This step is required to verify that the location and clamping voltage of the limit circuit will not result in a LG < 1, or that the operational amplifiers will reach their saturation voltage. The limit circuit can be located across any of the three amplifiers as long as the LG > 1. Step 4 is demonstrated by analyzing the limit circuit shown in Figure 21 for the ratio oscillator. This limit circuit is suitable when the operational amplifier use dual power supplies greater than 2V. Additional limit circuits for single power supply applications and low voltage applications are given in, which also has reference designs of the absolute and ratio oscillator circuits using ON Semiconductor's sub-1 volt operational amplifiers and comparators.

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