Verify the design of two-way radio

Two-way radio components
The products developed by the Enterprise Mobility Government and Public Safety Sector include two-way radio and related communication devices for the land mobile frequency allocations (30 MHz to 1 GHz) worldwide. Public safety officers simply cannot afford to be without communications - their network must be an "always available" lifeline to keep them in contact and up-to-date with vital information.

In addition to coverage and reliability, mission critical mobile applications require high levels of voice and data functionality, competitive costs, and low power consumption. As a result, we are moving more functions from discrete board-level components onto complex RFICs. The RFIC performance and functionality must match and in many cases improve upon existing board-level designs.

The RFICs used in two-way radios include several complex analog and RF circuits such as low-noise amplifiers, quadrature modulators and demodulators, post-mixer amplifiers, phase-locked loop (PLL) frequency synthesizers, and numerous baseband and control functions. Verifying and characterizing these circuits poses a significant challenge. Even the simplest circuits in these RFICs have very long simulation times and simulation convergence issues. As we create more high-performance and complex circuits, the analog/RF circuit simulation flow and tools became a significant limitation in our design cycle and time-to-market.

RFIC Verification requirements
Verifying high-performance RFICs is challenging because the circuit simulator needs to predict circuit linearity and noise with a very high degree of accuracy, with silicon as the reference. Simulation accuracy, which translates into circuit dynamic range noise margin, is critical to our ability to meet specifications without costly respins.

Our baseline verification flow for analog and RF circuits relies on traditional SPICE simulations with tight tolerances to deliver the required accuracy. By traditional SPICE, we mean a tool that uses standard foundry transistor-level device models without approximations, finds and maintains a true DC operating point, solves the full matrix at every timestep, and maintains SPICE-level relative tolerance (reltol).

Our baseline flow works well for small circuits, but it breaks down with the complex circuits that our RFICs require. Traditional SPICE simulators cannot keep up, either in terms of performance or capacity. We have the additional requirement of functional verification of transceivers at the full-circuit level with as much accuracy as possible to detect circuit errors prior to tapeout.

Digital simulation methods are inadequate for RFICs
As we looked for ways to meet our RFIC verification requirements, we considered tools that speed-up digital circuit verification, including fastSPICE tools and behavioral simulation. FastSPICE simulators speed up digital and memory simulations, but they do not have sufficient accuracy for RFIC circuit characterization or meaningful full-circuit RF transceiver simulation. Receiver linearity and sensitivity measurements require high dynamic range and accuracy. Simulators that increase performance and capacity by trading off accuracy produce output that is simply not useful for our analog/RF verification process.

We have found that behavioral model abstractions for RFIC circuits are not practical and cannot replace transistor-level simulations. When errors creep into these models, they become liabilities. Designers believe that their circuits are functioning correctly when they are not. The bottom line is that we need verification and characterization tools that deliver the accuracy of traditional SPICE simulators down to the SPICE noise floor with significant performance and capacity improvements.

Analog FastSPICE methodology and results
We achieved our objectives for RFIC verification with the addition of the AFS circuit simulator to our flow. AFS delivers the accuracy, performance, and capacity we require to verify our complex analog/RF circuits and run full-circuit RFIC simulations. The tool delivers results that are identical to our traditional SPICE simulator, but 5 to 15 times faster, and AFS has the capacity to handle our full-circuit RFIC simulation, which was impossible with other simulators. AFS plugs directly into our existing flow and supports our standard process design kits, and our designers were up and running in half a day with no additional training.