Design Article

Measure the input capacitance of your op amp

Akshay Bhat, Maxim Integrated Products Inc.

5/8/2011 10:49 PM EDT

Op amps with low input capacitance are required in applications such as smoke detectors, photodiode transimpedance amplifiers, medical instrumentation, industrial control systems, and the piezo-sensor interface. CMOS-input op amps, for instance, require minimal input capacitance when amplifying capacitive-sensor outputs or the small signals from high-impedance sources.

Input capacitance also affects a pole in the feedback path that can cause instability in high-gain, high-frequency applications. By minimizing this input capacitance, you may be able to increase the corresponding pole frequency until it has a negligible effect on the circuit.

Measuring the input capacitance of an op amp isn’t trivial, however; especially if the value is only a few picofarads. Such low values also present difficulties in screening the op amps during production testing. Hence, semiconductor companies often provide only typical values for this parameter, using simulation results and bench measurements on a few known good units. The following discussion can provide a sanity check in the lab by assisting the system-level designer or QA engineer to accurately determine the input capacitance for any op amp.

The direct approach of observing input capacitance on a multimeter isn’t practical below a few nanofarads. A simple yet effective alternative is to insert a large resistor in series with the op-amp input (Figure 1).


Figure 1: A resistor in series with an op amp input enables measurement of the op amp’s input capacitance.

Plotting the frequency response of the resulting first-order lowpass RC filter on a network analyzer (i.e., a Bode plot) lets you calculate the op amp’s input capacitance. Sounds simple, but you must follow precautions to ensure that the measurement accuracy isn’t compromised by stray capacitance in the PC board (PCB) and the test setup.

Follow these tips to minimize stray parasitics:

  • Increase the measurement resolution by using only low-capacitance FET probes (<1pF), such as the Tektronix P6245.
  • If the series resistor is a surface-mount component, ensure that the board capacitance to ground is as low as possible. (This implies no ground-plane layer beneath the input signal traces and the series resistor.)
  • If the series resistor is a through-hole component, bend the input pin so it does not contact the PCB board, and use a short lead length to solder the resistor directly to the op amp input pin.
  • Do not use a breadboard in the test setup, because capacitance between the breadboard tracks and jumper wires can degrade the measurement accuracy.
  • Use short traces at the input to minimize series inductance.

The hardware recommended for this test setup (Figure 2) includes an Agilent 4395A network analyzer, a Mini-Circuits ZFRSC-2050 power splitter, and a Tektronix P6245 active FET probe.


Figure 2: Test setup for measuring op-amp input capacitance.

First, calibrate the setup with no op amp installed on the PCB. From the resulting Bode plot, you can calculate stray capacitance as Equation 1:

                

where f1(-3 db) is the corner frequency as measured on the network analyzer with no op amp installed, and RTH1 is the Thevenin-equivalent series resistance. RTH1 is a function of the inserted series resistor, the input termination resistance (50Ω), and the source impedance at the power splitter (50Ω), Equation 2:

                                                          

Next, install the op amp on the PCB. Since the board’s stray capacitance is in parallel with the op amp’s input capacitance, Equation 1 becomes Equation 3:


where f2(-3 db) is the corner frequency as measured on the spectrum analyzer with the op amp installed, and RTH2 is the Thevenin-equivalent series resistance.

This Thevenin equivalent resistance is a function of the inserted series resistor, the input termination resistance (50Ω), output impedance of the power splitter (50Ω), and the common mode input impedance of the op amp, Equation 4:

                                 

The input common mode impedance of an op amp is not accurately known. For a CMOS-input op amp, however, it is fairly easy to select RSERIES << RCM. Then RTH2 ≈ RTH1, and Equation 3 can be rewritten as Equation 5

You can now calculate the op amp’s input capacitance from Equations 1 and 5, and verify the value by repeating the experiment with two different values of series resistor.

 

To illustrate the method, consider an input-capacitance measurement for the MAX4238 op amp.

Figure 3 shows the amplitude response from Figure 2 using a 200 kΩ series resistor and no op amp installed on the PCB, and Figure 4 shows the amplitude response with the MAX4238 installed.

Figure 3: Amplitude response from Figure 2, with RSERIES = 200 kΩ and no op amp installed on the PCB. The f1(-3dB) frequency is indicated by the downward-pointing arrow.

 



Figure 4: Amplitude Response from Figure 2, with RSERIES = 200 kΩ and the MAX4238 op amp installed. The f2(-3dB) frequency is indicated by the downward-pointing arrow.

 

Table 1 summarizes the results, using the frequency-response waveforms and calculations from Equations 1 and 5. As a sanity check, the measurement was repeated with a different series resistor value to demonstrate that a similar result (»4pF) is obtained.

Table 1: Summary of MAX4238 input-capacitance measurements


About the author
Akshay Bhat is with Maxim Integrated Products Inc., Sunnyvale, CA.

 





agk

5/9/2011 4:23 AM EDT

Other simple method is connecting a precision resistor of high value, precision capacitors and in the passband of the opamp measure the out put over a decade of frequencies. from the two results it is possible to calculate the input capacitance of the op amp circuit.Needs a good scope and signal generator.

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zeeglen

5/10/2011 12:19 AM EDT

Another easy method: Use a breadboard, an airline type on pcb solid copper plane. Wire the opamp under test with the input pin sticking up in the air with a 1M resistor attached for bias.

Build an LC oscillator with the known C (about 10-100 pF or so, not too much larger than the expected opamp Cin)physically close to the opamp input under test - like a fraction of a millimeter. Measure the oscillator frequency with a counter while the C is not touching the opamp input pin. (The inductor should be chosen to oscillate a few tens or hundreds of MHz, not critical as long as within range of the counter). Then with a plastic tool gently touch and bend the opamp pin just barely enough to make parallel contact with the LC tank capacitor and note the frequency change. Do not use excessive force or the physical position change of the original LC components will add to the frequency shift and introduce measurement error.

Alternately you can drop a blob of solder to achieve the same result.

Then use the LC resonance formula f = 1 / [2 pi sqrt(LC)] to calculate how much capacitance was added to the known LC tank capacitance based on the observed delta f.

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agk

5/15/2011 9:17 AM EDT

Zeeglen an elegant easiest testing method !

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TPEngineer

5/10/2011 11:47 PM EDT

To simplify the procedure, I suggest the following:
1. connect probe to output of DUT - the DUT will act as the buffer.
2. put a guard trace from the DUT output around the input - this would eliminate most of the stray capacitances on the board, since the signal at the output is in phase with the input.
3. use a higher value Rsense - to bring the 3dB roll-off point lower, such that the pole of internal roll-off of the OpAmp does not interfere with the measurements.

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bcarso

5/11/2011 11:23 AM EDT

Some details: All resistors have distributed parasitic capacitance. Typically the smaller they are the smaller the capacitance, so SMD is favored over leaded parts. You can also chain them together for a net reduction. By adjusting the spacing from a ground plane some of this C can be effectively reduced, but clearly that's a slippery slope --- better to minimize by using small parts and/or chaining them. Note that what is left over will have the effect of making the input C of the DUT seem smaller.

The capacitance in the figure is shown as to ground. In reality it consists of a number of components: substrate C, input device (say they are FETs for example) gate-source-to-current-source-and-other-input-device C, and any drain-gate C (with associated Miller multiplication, if any). The second term gets reduced by the feedback in the voltage follower configuration, although this is bandwidth-dependent. And then there's the package and bond wire fixed C.

All of these may matter for a given application. What we are measuring for this example is specific to voltage followers. Still, it's a good place to start.

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mojtaba_dayani

6/4/2011 5:17 AM EDT

A dramatic circuit capacitance compared to opamp input capacitance! This method may also be used to measure any node capacitance with respect to another node in a real PCB.

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