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Design Article

Conditioning techniques for real-world sensors

Steve Taranovich

11/15/2012 12:46 PM EST

page 2

Applications

Microchip’s Tretter notes that when chopper-stabilized amplifiers first came to market, their large switching current and layout sensitivity made them difficult to use as well as cost prohibitive. Designers thus limited implementation to select applications in which performance was absolutely critical. Advances in process technology and silicon design have since enhanced the usability of zero-drift amplifiers, proliferating their use across a wide range of applications, including medical devices; industrial flow meters, multimeters, and high-end weight scales; and even gaming devices.



Figure 3
A Wheatstone-bridge sensor conditioned by a zerodrift op amp is shown. Even when using multiple sensors in a Wheatstone-bridge configuration, the total change in output voltage is relatively small; thus, a gain stage is usually required before converting the voltage to a digital signal via an ADC (courtesy Microchip Technology).
Many sensors, such as strain gauges, RTDs (resistance temperature detectors), and pressure sensors, are commonly arranged in a Wheatstone-bridge configuration (Figure 3) because that circuit type offers excellent sensitivity. Even when using multiple sensors in a Wheatstone-bridge configuration, the total change in output voltage is relatively small, typically in the millivolt range. Because of the small signal amplitude, a gain stage is usually required before converting the voltage to a digital signal via an ADC. Zero-drift amplifiers are a good choice for such applications because of the need for high gain and minimum noise, Tretter says.

IA design considerations

Adolfo A Garcia, vice president of marketing and applications for Touchstone Semiconductor, notes that when supply voltages are low (<3V) and the available choices for self-contained IAs (instrumentation amplifiers) are limited, designing your own IA is straightforward, so long as the op amp’s input and output dc characteristics and circuit topologies are understood. Two very common topologies respectively use two and three op amps to construct the instrumentation amp.

Figure 4 shows the two-op-amp topology. When applying single-supply, rail-to-rail, low-power op amps, primary considerations for their selection, depending on the application, include dc parameters such as VOS, TCVOS, AVOL(MIN), IOS, VOH(MIN), and VOL(MAX), and ac parameters such as the amplifier input-referred noise and bandwidth. Regardless of the application, maximizing output dynamic range is key to achieving maximum circuit performance. Single-supply op amps whose output stages offer the widest dynamic range are the best choices, according to Garcia, because amplifier output-stage saturation is to be avoided.


Figure 4 This illustration of a conventional two-op-amp instrumentation amp and its associated output/input voltage-transfer equation shows that two single-supply op amps can be configured into an instrumentation amplifier if certain op-amp parameters are understood and applied correctly (courtesy Touchstone Semiconductor).

Note the reference-voltage term (VREF) in the circuit’s transfer equation in Figure 4. To avoid output saturation in AMP1, the instrumentation amp’s output signal must be measured relative to VREF. In a 3V (or lower) system, one might conclude that, in order for the circuit to exhibit maximum dynamic range and avoid output-stage saturation, simply setting VREF equal to one-half the supply is sufficient. That conclusion is only valid, however, if the selected op amp’s VOH(MIN) and VOL(MAX) specifications are symmetric with respect to its supply datum, Garcia observes.

Dispensing with a rigorous nodal circuit analysis of the two-op-amp IA topology involving the differential input signal voltage (VIN), the applied input common-mode voltage (VCM), and the reference voltage, VREF should be designed so as to bias AMP1’s output in the middle of its output voltage swing (and not exactly at one-half the supply voltage), as Equation 1 shows:


Select the desired gain of the IA so as to prevent output-stage saturation. In the case of the two-op-amp IA, the expression derived from the nodal circuit analysis is shown in Equation 2:


In Equation 2, VIN(MAX) is the maximum differential input voltage applied to the IA circuit. If the desired gain is a known circuit parameter, you can rearrange the appropriate terms in the equation to determine the maximum input differential voltage that can be applied to the circuit to prevent output-stage saturation.

For the lowest power operation, resistors used in the circuit should be 100 kΩ or larger, depending on noise and bandwidth design considerations. Also, it is important to point out that an op amp’s VOH(MIN) and VOL(MAX) voltage specifications are highly dependent on amplifier output-stage loading, so pay particular attention to load-resistor conditions.

In a real-world example, a TS1002 dual 0.6-μA op amp was chosen to construct a gain-of-10 two-op-amp IA that operates from a 2.5V supply. The TS1002’s VOH(MIN) and VOL(MAX) specifications into a 100-kΩ load are 2.498V and 0.001V, respectively. Using Equation 1, a VREF equal to (2.498V+0.001V)/2=1.249V offsets the output stage to maximize output dynamic range and avoid output-stage saturation. At a prescribed gain of 10, the maximum differential input voltage that can be applied to avoid output-stage saturation is (2.498V+0.001V)/(2×10), or 125 mV.

You can perform a similar analysis on the three-op-amp IA configuration (Figure 5). Again, dispensing with the rigor of a comprehensive nodal circuit analysis of the three-op-amp IA and involving the terms mentioned previously, the results of the two-op-amp IA apply equally well here; that is, for maximum dynamic range, the output reference voltage is set to be in the middle of AMP1 and AMP2’s output-voltage swing (Equation 1).


Figure 5 Three single-supply op amps can be configured into an instrumentation amplifier if certain op-amp parameters are understood and applied correctly (courtesy Touchstone Semiconductor).

The expression for circuit gain is of the same form as for the two-op-amp IA (Equation 2). The circuit’s output voltage is measured with respect to VREF; VREF is designed to be in the middle of AMP1 and AMP2’s output-voltage swing; and the maximum differential input voltage that can be applied to the three-op-amp IA is determined from Equation 2.

In another real-world example, designers used a Touchstone Semi TS1004 0.6-μA quad op amp to construct a gain-of-50 three-op-amp IA that operates from a 2.5V supply. From the TS1004’s data sheet, its VOH(MIN) and VOL(MAX) specifications into a 100-kΩ load are 2.498V and 0.001V, respectively. Using Equation 1, the output stage is offset by a VREF equal to (2.498V+0.001V)/2=1.249V in order to maximize output dynamic range and avoid output-stage saturation. At a prescribed gain of 50, the maximum differential input voltage that can be applied to avoid output-stage saturation is (2.498V+0.001V)/(2×50), or 25 mV.


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