So many questions, so little time: Which Spice will suffice?

In 2002, Dataquest/Gartner reported that 38% of electronic designers used breadboarding as their means of design. But a growing population of younger engineers is replacing retiring gray-haired analog designers. That, coupled with today's technological demand, warrant this new growing breed be accustomed to EDA tools.

Of course, websites and product collateral can make vendors' individual SPICE tools seem like the best thing since spice trade during the middle ages. It's a challenge to ascertain the practical value of what some seven leading analog tool providers advertise. In short, analog and mixed-signal designers must sift through an array of scalable offerings, product features and methods of tool operation before making their buying decision. Add to that customer care quality, technical support competency and company track record, all making the SPICE order considerably more than mild.

The playing field for SPICE-based tools that target board design and "lighter" IC simulation (focus of this article) runs the gamut, ranging from free-ware to more than $12K for a node-locked seat. Notably, full IC-centric offerings typically run 10-30 times higher than "shrink-wrap market" counterparts.

Software most useful to a designer, and its price tag, must be individually balanced for today's circuitry ranging from simple to high complexity. This article is focused on unveiling the benefit of SPICE simulation tools, what specific features may apply to the reader's design need, and effective means to query a tool provider before purchasing.

Establish your design criteria before employing Spice simulation tools

Probably the first criterion to purchasing a SPICE software package is to ask if you're open to it! Not to worry; by the time you reach the end of this article, you'll know. And what about breadboarding; is that now passe'? Hardly! Consider this:

Breadboarding a design:

Advantages:

• Real world parts ensure real world accuracy
• Employs existing lab equipment that measures real signals in real time
• Final design is truly working circuitry
• Saves $1k to $12k in initial design automation cost

Considerations:

• Parts can require lead time, and work for only one set of parametric values (with no EDA)
• No instruments measure things like worst-case parametric variation, component temperature coefficient, component noise, sensitivity between parts, etc.
• Final design truly works for only one set of component and temperature parameters
• A potential loss of thousands, to hundreds of thousands of dollars, can result from inefficiencies in documentation, version control, design changes and production fallout from inadequate verification.

OK so far? Let's dig deeper. What are your important design criteria? Here's a tickler list that may help you assemble them.

Table 1 (click to enlarge)

What Today's SPICE-Based Tools Furnish

I mentioned that this article will supply an ample amount of information to aid you in considering a tool purchase (again, not targeted at high-end IC simulation tools). However, it won't supply a magic solution "guaranteed" to significantly reduce your design effort " though it could. Nor will I compare the effectiveness and capability of several SPICE providers' offerings. The features and information that follow are general descriptions and guidelines supplied in a practical format. Specifics regarding a tool provider's offering should be directed to that supplier. Competitive information is supplied via a link at the end of this article.

Probably one of the first questions that comes to mind before making a SPICE tool purchase is can the vendor furnish an adequate quantity of accurate component models for a design. The answer in many cases is yes.

Modeling checklist.

• Feature: Vendors typically supply between 5,000 and 16,000 component models ready for circuit simulation.
• Considerations: Some vendors include things like resistors, capacitors or PCB layout models (footprints) in their model count. These should not be included as part of the simulation model count. Also, see how many models might represent the same component but with different extensions, i.e., for mil. spec, different temperature, packaging type, etc. Such variations have no bearing on the model's intended simulation performance and therefore should not be considered part of an advertised model count.
• Feature: Vendors provide model-building tools to construct new models not supplied as part of their model offering. Examples include C-code language, B-element (Berkeley SPICE's voltage & current sources for model creation) datasheet entry for model synthesis of discrete parts (e.g., BJT, SCR, diode, Triac), cloning from existing models with ability to change parameters, and web importation of SPICE models from manufacturers' websites.
• Considerations: Some modeling tools are easier to use than others. See if the demo CD has model building capability, or get a demo from the SPICE vendor (minimally, a description from technical support). Confirm there is an efficient means of using an existing graphic symbol, or to create a new symbol, for attachment to a new SPICE model. You can also ask if a substantial collection of behavioral models are available, which perform things like math function, pole/zero, polynomial expression, voltage and current source, electro-mechanical function, physics function, etc. Such blocks (or programming language) often can be combined to create high-level components or circuitry, which can eventually be modeled in more detail using actual part models. Finally, ask if the SPICE vendor supplies a modeling service internally.
• Feature: SPICE tools can provide preferred parts lists, including capability to enable only parts approved by a design administrator.
• Considerations: Note that SPICE tools do provide parametric variation capability to "preferred/secured parts" for exploring what-if design scenarios.

Design entry and management

• Feature: Today's SPICE tools provide a fast and efficient means of creating schematics, editing their content and saving various renditions. Design versions may be geared for different levels of model abstraction (i.e., for faster simulation, or slower " but more refined); production; PCB layout; regression testing; etc.
• Considerations: Designs are filed and accessed by schematic, project, version, etc. Some vendors' provide a more intuitive means than others, and may include "checkout" capability for managing design distribution.
• Feature: SPICE tools can accommodate various levels of design management for control and security.
• Considerations: Some vendors provide parts database management tools with ties to entities like ODBC and PartMiner, or self-contained management tools for component libraries and designs.
• Feature: Schematic entry often includes special schematic operations such as cut, paste, rotate, and flip for components and circuitry; inclusion of text and special graphic shapes on the schematic; display of DC operating point and waveforms; and turn on/off of component reference designators and values.
• Considerations: Depending on your need, such features can be of great value if you create several versions of a design and need control on what is displayed on the schematic for easy identification, documentation or electrical measurement.
• Feature: Often, a high-level component symbol is desired at the top level of a design, with its circuit detail ascribed underneath that symbol. Such a capability (e.g., subdrawing) enables a "cleaner" high-level schematic representation and corrals detailed circuitry on a separate page for debugging (Figure 1).
• Considerations: Check to see if changes made to one subdrawing will be reflected to the same instances of it across the design, and across all design versions (schematic configurations)!

Figure 1: High-level components in a GPS receiver can be viewed as detailed circuitry (power supplies) in a small schematic window.

Design simulation.

• Feature: Setup for design simulation can accommodate any number of run types such as transient, frequency, operating point, DC sweep, transfer function, noise, distortion, Fourier, sensitivity and circuit temperature.
• Considerations: Different vendors supply varying simulation capability. Ask which analysis types are supported and check out how easy it is to set up, run and interpret results of each analysis type. If desired, inquire if several different types of simulations (e.g., time, frequency, DC sweep) can be automatically run sequentially. Simulation setups should be able to be saved and recalled for future runs.
• Feature: A good SPICE simulator can accommodate tough design topologies such as switching circuits, oscillators, complex feedback loops, high frequency, and mixed-signal design with large variations in timing between signals and transitions.
• Considerations: Query the SPICE vendor for what enhancements they have built into their simulation kernel to maximize convergence and simulation accuracy. Also ask what advanced convergence parameters and algorithms are built into the simulator for maximum performance: e.g., forward predicting; matrix load bypass; GMIN, source stepping, sparse matrix, predictor-corrector; alternate UIC; VSECTOL; AUTOTOL; pseudo transient.

Such enhancement can be crucial for the successful simulation of various complex designs, and often is the main differentiator between a strong offering and one geared for simpler design (e.g., educational offering emphasis). A convergence wizard (help dialog box) and access to the simulation engine's convergence parameters should also be made available for the novice and experienced user respectively. If apropos, similarly ask if there have been enhancements in the kernel and component model offering to accommodate RF (high-frequency components, Smith charts, 2-port analysis) and complex power electronic design

Debugging tools

SPICE offerings provide a number of tools valuable for debugging a design:

• Parametric sweeping: This feature enables a user to specify what increments a component value or parameter will be stepped, through a series of automated simulation runs. Corresponding waveforms at desired points in a design are then viewed as a curve family. Typically, more than one component (resistance, transistor beta, etc.) can be stepped through its specified range as an inner loop, as another selected component is in turn stepped one successive notch through an outer loop. Refer to Figure 2. Some vendors provide the ability to simply "turn a knob" so to speak, on a component value or parameter (like the capacitance of a heatsink), and view waveforms in real time (Figure 3).

Figure 2. The "heatsink" capacitance (C ) created from switching transistor (X1), coupled through X1's heatsink to the AC mains' ground (prior to DC source on far left of design) is swept through a range of values, with bypass capacitor (C10) repetitively swept through its entire range after each step of C "heatsink." Resulting "nested" sweep curve family shown for Vout design node.

• Waveform viewing: One of the advantages of SPICE vendors is their ability to provide a host of different types of design analysis waveforms using one viewing tool. Figure 4 displayed a unique "thumbnail" waveform viewer. This type of graph conserves simulation time compared to traditional "marching waveforms" inside a full waveform viewer, which requires much more post-processing of data. The thumbnails provide individual high and low measurement values per signal, furnishing a preliminary feel for the design's performance.

Figure 3 Capacitors Cheatsink and C10 are tweaked by simply pressing any arrow or "always" for continuous real-time sweep. Simultaneously, thumbnail waveforms display real-time data, as does the "Measurements" window for numerical readout of any measurement selected throughout the design. All this requires no schematic interaction!

A full waveform-processing tool carries a rich set of features for post-simulation signal analysis. One such provision is its ability to perform complex waveform operations. Typical examples include a gamut of mathematical operations, filter functions, forward and reverse Fourier transformations, Bode plot, gain & phase margin and other signal processing (Figure 4). This beneficially conserves design time by providing an engineer with a snapshot of what design functions would be advantageous to explore without having to first create corresponding circuitry. Other waveform viewing features include the ability to assign graphs with any number of colors and markers for easy identification. Cursors enable the readout of numerical data such as delta between two signals, or a signal's average power, peak-to-peak voltage, mean value, rise time and more. Further, one can plot any variable against another, such as circuit gain verses temperature or power verses collector current (Figure 5). Finally, schematic cross-probing lets the designer click on any component or design node as the waveform comes to view.

Figure 4 Special 20% "Hanning Taper" processing of Vout signal performed instantly with waveform calculator. More than 150 special functions available with a mouse click. Vertical cursors numerically read out peak-to-peak reading (or any such measurement) of Vout.

Figure 5. Versatility of waveform viewer showing plot of voltage into top leg of transformer on the X axis, verses forward voltage into center primary winding (plot 1), current into the primary (plot 2) and current through the core, all on the Y axis.

• Cycling through the debug process: Of course, a designer needs to constantly try different what-if scenarios by tweaking component values, adding or removing a component, etc., then re-run a simulation to view changes at desired points in the design. A SPICE vendor may provide a number of ways to maximize the efficiency of this process. One example is to minimize the amount of steps needed to engage in several bouts of schematic change and waveform viewing, including different ways to refresh new waveform data. Figures 6 shows the overwriting of previously viewed waveforms with updated data, following a change in L3 and L4. Two other update options are listed in the figure. Once the component changes were made, the entire process took only one mouse click and a keyboard "Ctrl U" for re-simulation and updated views of the previously viewed signals, in any of three modes! A "Save Preferences" command re-invokes the above preferred modes of operation for future simulation.

• Advanced Design Verification:Advanced design verification tools are where the rubber meets the road for engineers requiring high production yield and design reliability. Basically, SPICE verification analyses are geared to torture components by varying their parametric data in a number of ways. Typical examples include running a variety of statistical distributions (bi-modal, Gaussian, et al.) on component values through their tolerance range, or running worst-case paradigms. Common worst-case scenarios include:

1. Railing all component values and appropriate electrical specifications (e.g., beta) to their most negative or positive tolerance values

2. First running a sensitivity analysis, which determines how sensitive a component's operation as a result of variation from another component. Based on the outcome of that, the simulator will (by formula, statistical distribution or railed tolerance limit) perturb components' values in a worst-case fashion.

Figure 6 New waveform data overwrites existing waveforms previously viewed. The other two modes append the new data to the old, or insert it into a new waveform graph.

A Monte Carlo statistical analysis generates three types of data formats. A family of curves shows every waveform generated from all simulation runs for a selected measurement on a design, e.g., output voltage (Vout). A histogram plot illustrates bins or groupings of the simulation runs, each group illustrating how many runs furnished results within a range of values specified by the user " Example: 7 runs measured Vout between 5.02 and 5.12 volts: 2 runs measured Vout between 5.13 volts and 5.25 volts: 4 runs through a specified time period. A cumulative density plot shows a few possible datasets. Figure8 displays signal variation (sigmas) of Vout verses corresponding signal values. Further, statistical data for any measurement specified in a Monte Carlo analysis might also be provided in numerical format. Examples include minimum, mean and maximum value and standard deviation. Figure 7 illustrates a curve family from a Monte Carlo run, and Figure 8 illustrates the other two distribution formats.

Figure 7 Split schematic view enables independent zoom to magnify Vout. The Monte Carlo statistical run shows a fairly tight curve family for Vout, with another view putting each run on a separate axis to view signals' variance.

Figure 8. Histogram distribution showing quantity of runs within signal boundaries. Cumulative distribution in middle displays variance in Vout from a nominal run on the X axis, verses voltage on the Y axis. Also note standard deviation of selected data point. The bottom chart illustrates component variance in sigmas and corresponding value.

Of course, attachment of any "phantom" component or condition to a design is a handy way of testing "what if" conditions. One example inserts an open, short or stuck-at condition on a component. A simulation is re-run and waveform data is viewed anywhere in the design. Figure 9 illustrates complete automated fault synthesis of open, short and stuck-at value on the design's components. Though some SPICE vendors provide power violation flags for components that exceed their manufacturer's rating, in this example, violations (out of test limits as specified by the engineer) for any electrical measurement (e.g., beta, Icc, maximum power, rise time, etc.) are monitored and recorded throughout the design. This can be useful in monitoring whether critical design points fail, including the assignment of hard fault conditions. Such data is illustrated in numerical chart format and colored histogram as to the failure's severity.

Figure 9 Entire fault dictionary is formulated and test description synthesized for isolating faults across entire design.

For production or field-testing, special test diagnostics can be performed as shown in Figure 9. Here, a complete fault dictionary is constructed of all faults throughout the design. Special algorithms then run a complex course to ascertain what fault caused a measurement failure in the design (if detectable). Full fault coverage reports are also generated, in all saving months of test development time. Test points can then be hard wired in the circuit board to monitor measurements with instruments or automated test equipment for fault isolation.

Other features provided by SPICE software vendors:

There are a lot of unique features provided by various SPICE tool providers. Again, one must ask themselves whether a given software feature or application justifies its cost or necessity. Keep in mind that with any design automation tool, learning its methodology and level of utility for your design need, could be more important than splitting hairs on how different vendors perform a particular function or application, or how some advertised whiz-bang feature is the end-all to successful design. From my experience, ease of use, intuitive operation and simulation power rank much higher than some of the advertised features with SPICE tools. There are exceptions to this so you be the judge. Following are a list of other features I have encountered from various SPICE tool suppliers.

• Benchtop instruments interface mimics the look and feel of actual lab counterparts for measuring signal performance with various types of simulation, e.g., VOM, oscilloscope, spectrum analyzer, power meter, etc.
• Design optimization automatically calculates component values based on a design objective prescribed by the user. Objectives include things like phase margin, amplifier gain, filter bandwidth and minimizing overshoot.
• Scripting language enables users to write custom routines that allow the simulator to perform special functions such as set run breakpoints, custom waveform calculations (e.g., EMI-IEC specifications), worst-case runs, and various design optimization functions. Existing routines can be modified to create functional variations.
• Pole/zero analysis studies the performance and stability of a design by extracting the poles and zeros from polynomial expressions. Poles and zeros are often used to compensate gain and phase shift for improved design stability.
• 2-port analysis & Smith charts study S-parameters (and others) and transfer function of a multi-port design network. Smith charts plot things like capacitive and inductive aspects of a network, and can point to instability in design.
• Test synthesis constructs a complete fault dictionary of all fault conditions synthesized across an analog or mixed-signal design. From that, fault coverage reports and pseudo test code are generated.
• Vendors can provide direct or indirect integration to PCB, FPGA and VHDL design tools.

For a features matrix with some of today's popular SPICE vendors, visit: http://www.intusoft.com/products/Compare.htm

About the author

Tim Ghazaleh is marketing director for Intusoft. Intusoft produces analog and mixed-signal SPICE simulation and test synthesis software. Tim has been involved in EDA marketing for 9 years, as well as engineering for robotics, instrumentation and test for 8 years.