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Design Article

Under the Hood: Sonos brings multi-zone digital audio to life

Patrick Mannion

3/18/2008 2:22 PM EDT

How'd they do that?

So how'd they do it?
On opening the ZP100, one of the first hardware decisions becomes clear: the team went with an IEEE 802.11b/g wireless mini-PCI card design from Atheros Communications for all its wireless connectivity.


(Click on image to enlarge)

Fig.3: Top view of ZP100 showing Atheros mini-PCI wireless card on upper left, Renesas SH-4 RISC processor in center, Samsung and ISSI memory on bottom left and Ethernet controller and magetics on bottom right.

"The wireless connectivity was the most nerve-wracking part of the whole design and Atheros gave us access to the drivers and all the knobs we needed to tune the system to get the performance we needed," said Schulert. The ZP100 design uses Atheros's AR5213A baseband/media access control (MAC) and AR2112A transceiver chips. The beauty of the SonosNet setup versus a traditional wireless access point is that the user doesn't have to worry about SSIDs and passwords, said Schulert. "We broadcast, look for devices, and add them to the household."

Also, the antenna placement is such that it's buried within the enclosure. This is allows the user to perceive the ZonePlayer as a stereo, not a Wi-Fi device, he added.



Fig.4: The antennas (gold spikes on upper left and bottom right) were hidden inside the enclosure to make the system seem less complex.

The main processing on the ZP100 is shared among a number of key chips. First up is the Renesas SH-4 microcontroller running Linux (see Fig.3 above). Click here to test drive some Renesas processors. Linux was chosen as it allowed the engineers to get complete access to all the source code to enable debug. The Renesas SH-4 was chosen across the whole system for three reasons: it is low power, which is critical for the wireless controller; it does floating-point, which allows it to efficiently decode MP3 audio; and it supports mini-PCI interfaces.

The other main processor resides on the main amplifier board and is the Texas Instruments TMS320V5402 16-bit, fixed-point DSP. This performs real-time buffering to keep the codec full and also does audio equalization. While Schulert admits it may be a bit overkill for these functions, and if they had to do it over again they might pick a lower-performance device, he pointed out that they wanted to ensure plenty of processing overhead.


(Click on image to enlarge)

Fig.5: Main amplifier controller board showing TI DSP bottom right, Cirrus Logic codec on left, Tripath Class T controller center (between two capacitors) and Class T interference suppression filter components on top.

Supporting the main processors is a Renesas M16 16-bit microcontroller (bottom, center of Fig. 5 -- white label on top of it) to tie up loose control ends, as well as a Cirrus Logic CS42416-CQZ 192-kHz multichannel digital-to-analog and analog-to-digital codec with on-board phase lock loop (PLL) and a minimum 110-dB dynamic range. The codec also provides digital volume control and differential analog outputs. Other support chips include a RealTek RTL8139CL Ethernet MAC, a Kendin KS8995MA Layer 2 Ethernet switch with five 10/100 transceivers, a Lankom SQ-H48W Ethernet transformer module and an Atmel AT27LV512A 512-Kbyte one-time-programmable (OTP) boot EPROM. Memory comprises two ISSI IS42S16800B-7T 16 Mbyte x 8 (128 Mbit) synchronous DRAMs for main program code as well as 32 Mbytes of Samsung NAND flash for storing code as well as the index to the stored music archive. That can now store up to 50,000 titles.

The main amplifier section is a Class T design that relies on two STA505 half-bridge FET power amplifiers controlled by a Tripath TC2000 Class T controller with proprietary Digital Power Processing technology.


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Fig.6: Rear of main amplifier controller board showing STA505 half-bridge FET power amplifiers (center) from STMicroelectronics.

Class T amplifiers combine the audio quality of Class A/B with the efficiency of Class D. The TC2000 itself is a 5-V CMOS signal processor that amplifies the audio input signal and converts the audio signal to a switching pattern that's fed to the MOSFET drivers. Because of the high-frequency noise components derived from the switching, LC filters are required on the outputs to prevent the transfer of those noise components to the speakers (see Fig.5 above). Other power devices on board include two National Semiconductor LMS1587 3-A, fast-response LDOs.

ZP80 insides
The ZP80 is similar to the ZP100 but without the amplifier. Again, it relies on an Atheros WLAN design, but this time the more integrated AR2413A mini-PCI card.


(Click on image to enlarge)

Fig.7: ZP80 Zoneplayer insides showing Atheros mini-PCI card (top) and digital ICs with EMI protection (bottom).

Again it has a Renesas SH-4 and M16 microcontroller, a TI '5402 DSP, RealTek RTL8139CL Ethernet MAC, Atmel OTP EPROM, two ISSI 16-Mbyte x 8 synchronous DRAMs, the Samsung NAND (32 Mbytes) etc However, though the ZP80 has only two Ethernet ports, it still uses a Marvell 88E6060 6-port Ethernet switch (versus the Kendin controller on the ZP100) with an LF-H20P-1 magnetics chip.


(Click on image to enlarge)

Fig.8: ZP80 main board showing TI DSP and supporting memory below Atheros mini-PCI slot.

The controller relies on an Atheros AR2414A mini-PCI card and instead of 32 Mbtyes has 16 Mbytes of Samsung NAND flash. The controller is also differentiated by having a ball-bearing-based motion sensor and a Sharp 1/4-VGA transflective LCD display. Again, a Renesas M16 microncontroller is included, but this time to also manage the control buttons and scroll wheel.

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(Click on image to enlarge)

Fig.9: Controller's main board showing Atheros mini-PCI card, Renesas SH-4 controller and support memory, as well as ball-bearing-based motion detector (black square component, bottom left side).





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