Design Article

PSRR: The Real Story about Closed- and Open-Loop Class-D Amplifiers

Michael Firth and Yang Boon Quek, Texas Instruments

5/6/2009 9:57 AM EDT

As open- and closed-loop Class-D amplifiers increasingly become the preferred choice of consumer-audio electronics designers, a different way of looking at the effects of power-supply ripple is needed to adequately capture the performance of the amplifier. Today's audio designers are increasingly focused on reducing system cost, shrinking form factors and delivering high-quality audio, all of which require high supply-noise rejection architectures. Unfortunately, the power-supply rejection ratio (PSRR) measurement does not accurately capture the performance of Class-D bridge-tied load (BTL) amplifiers.

In this article, we discuss the traditional PSRR specification and measurement technique, and explain why it fails to adequately capture the supply-rejection capability of the amplifier. We then describe an alternate way to look at the effects of power supply ripple on the amplifier's audio performance.

See the full paper here




bcarso

5/7/2009 9:07 PM EDT

Quite a worthwhile read. However, the contrast is made between open- and closed-loop digital modulator amps. I would also note that such amps have a tougher time with switching power supply noise than do well-designed conventional class-D. Although the pitch has often been that you are eliminating a DAC when using them with digital sources, the trouble involved in managing the resulting system is IMO rarely if ever worth it. By the time you have gotten effective wideband digital-domain feedback, take a look at what the overall system looks like, and compare it to a decent separate DAC driving an analog-input class D amp.

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Invecter

5/8/2009 10:50 PM EDT

This paper brings to public attention the topic of PSRR in Class D amplifiers with H-Bridge (aka Full-Bridge) output stage. It rightly points out to IMD and THD+N being the important criteria when considering power supply ripple rejection performance of such amplifiers.

In the tests described in the paper, a ripple voltage with 250mV peak (500mV peak-to-peak) magnitude is said to have been employed. However, the paper does not mention the value of the constant DC supply voltage to the bridge (i.e. PVCC_x value for TS5706A), on which this ripple was imposed.

Assuming that the DC power supply was 25V (the recommended maximum value for PVCC_x of TS5607A is 26V, absolute maximum is 30V), the 250 mV-peak ripple represents only a +/- 1 percent variation in the DC supply magnitude.

From the figures in the paper, the closed-loop operation of the TS5607A device seems to suppress ripples of small magnitude (e.g. +/- 1% or thereabouts of the DC supply voltage).

Nevertheless, for closed-loop Class D amplifiers, I would like to see a technique that can suppress much higher magnitudes of DC supply variations or ripple, e.g. +/- 25 percent (50% peak-to-peak), without any deterioration in the THD+N and IMD performance of the amplifier.

Is there any feedback technique (analog or digital) than can achieve such high levels of supply ripple rejection/voltage compensation in Class-D amplifiers (while maintaining sufficiently low levels of distortion for audiophile sound quality)?

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