Class D driver IC: features and benefits
Class D amplifier dead-time (i.e., the period when both switches are off) directly impacts efficiency as well as THD. An overly short dead-time causes shoot-through currents that decrease efficiency a dead-time that is too long results in increased THD, which negatively affects audio fidelity.
The dead-time period must be set precisely to hit the “sweet spot” that optimizes both power efficiency and THD. The typical high-voltage audio drivers available today have coarse and overlapping dead-time settings (i.e., 1 of n delay values). As a result, most designers choose to implement the dead-time period using discrete components, which can be expensive and time consuming. A more elegant and cost-effective solution would be to integrate a gate driver with a highly precise dead-time generator.
Figure 2: Dead-time and its effects on THD and power consumption performance
Implementing a two-state Class D amplifier can be difficult due to input level shifting requirements. In high-power Class D amplifiers, it is desirable to have high-voltage supply rails (± VSS) for the power MOSFET stage. For practical Class D amplifier designs, a voltage of ±100 Vdc can deliver an astounding 600 watts of audio power into 8Ω.
Most available high-voltage IC (HVIC) Class D drivers lack the capability to provide level shifting from the low-voltage modulation section to the high-voltage power section. Drivers that provide level shifting have other deficiencies, making them less than ideal for Class D operation. (For example, the driver output ground terminal is referenced to a negative voltage rail, requiring the input drive signal to be level shifted to the negative supply). This functionality is added through discrete components, which can be costly and difficult to design and take up an inordinate amount of space. Level shifting solutions that provide an interface to high-voltage bipolar supply rails would be a significant advantage in Class D designs.
Most driver solutions typically do not offer input-to-output isolation or isolation between the drivers. Thus, it becomes necessary to provide a level shifting mechanism with extra components.
Figure 3: Level shifting is required to interface low voltage digital modulator to high voltage bipolar output supply
Reliability and noise immunity
Typical gate driver ICs available today have a tendency to latch-up at high voltage transients of 20 V/ns or greater and typically do not have any immunity to high slew rate noise transients coupling back from the power stage to the precision digital input side. This is a major disadvantage when trying to keep the noise floor as low as possible for the best audio fidelity.
One of the best attributes a Class D gate driver can have is its ability to operate at high switching frequencies with minimum of propagation delay. These attributes allow the total loop delay in the feedback path to be exceptionally low for the best possible noise performance. Higher frequency operation also improves the “loop gain,” which typically improves the distortion performance of the amplifier. Most HVIC drivers available today only support modulation frequencies of up to 1 MHz.
With today's highly competitive global markets, a solution that integrates all of these features would provide a much needed advantage to Class D amplifier designers, enabling them to get their products to market early by minimizing costly design time, component count, insertion costs and the implied lower reliability associated with higher parts count.
Class D amplification offers attributes far beyond traditional analog amplifiers, including lower THD, reduced board space, higher power efficiency and lower BOM cost. A highly integrated gate driver IC can have a significant positive impact on both the system architecture and audio performance.
Silicon Labs' Si8241/8244 audio drivers are the first devices that effectively integrate all the desired features of a high-power Class D solution in a single IC package. The benefits of these gate drivers include high precision dead-time settings for the lowest possible THD and best efficiency; no need for input signal level shift circuits to complicate design and increase component count; isolated output drivers for easy two-state switcher implementation; and a high immunity to power supply transients.
To learn more about the Si824x Class D audio drivers, and how these gate drivers provide a new paradigm for the high-fidelity audio market, visit www.silabs.com/audio-driver.
Ashish Gokhale is a product manager for isolation products within Silicon Lab's Embedded Mixed-Signal products group, based in Austin, Texas. Ashish joined Silicon Labs in 2010. Previously, he served as business development manager for isolation products at Texas Instruments (TI), where he was instrumental in developing isolation technology and launching products. He has worked in various technical and management roles in semiconductor process and product development at TI including technology development for deep sub-micron process nodes and product development for industrial interface products. He holds an MSEE and an MBA degree from University of Texas at Austin and a BSEE from VJTI, University of Bombay. He also holds two patents in the field of isolation technology.