Audio converter subsystem design in the 21st century – Part 1: Overview

I was wondering whether to bother with this section, since there is absolutely nothing here which will be news to generations of analogue designers. But then I remembered that analogue performance is nonetheless the limiting factor in many converter designs. Somewhere along the line we forgot some of this wisdom.

All of the buffer amplifiers, gain stages, etc., between the outside world and the ADC, and between the DAC and the outside world are an obvious area where good design practice will pay dividends – it is no mean feat to maintain the performance of a flagship data converter through the analogue circuits, particularly if you have to incorporate significant functionality.

In general, use a ground plane for analogue circuits, and take advantage of the very small SMT packages which are now available. Lay things down instead of standing them up. These measures will reduce susceptibility to interference and crosstalk for free.

Of particular importance are the buffer circuits which drive by the input of the ADC or are driven by the output of the DAC. In general, the safest policy is to stick to the exact circuit topology and components recommended by the converter manufacturer. They will have spent a long time coaxing the best out of their device by tweaking the buffer. However, this is not always the case! With experience and care it is sometimes possible to exceed the 'application note' performance. On the other hand, if cost is important you can often scrimp a bit on op amp types – the manufacturer is usually more interested in squeezing the best out of his device than in your budget.

Sigma-delta ADC inputs often have a non-linear input characteristic and will produce aliasing components if subject to HF, so an ideal ADC buffer must achieve a good amount of HF rolloff (but without compromising in-band flatness) coupled with a low output impedance. So it's better to avoid the passive pole between the output of the buffer and the converter input, and to use something like [5] instead.

Many high-quality DACs have current outputs, requiring an outboard current-to-voltage converter (IVC) circuit. Sigma-delta DACs often produce significant out-of-band noise, and the IVC must filter and/or cancel this in the first instance. Therefore the IVC must behave linearly up to very high frequencies (well above the audio band) if in-band linearity is to be maintained. If you are tempted to stray from the manufacturer's recommended IVC design, bear in mind the bandwidth requirement and note that the data converter output loading will probably have to be similar to the application circuit for optimum performance.

As for the rest of the analogue signal path: it is important to choose the right components and circuit topologies. The most straightforward way is to use op amps – and I'd say that nowadays this is a good policy except in a few very special situations such as mic/phono preamps and high-current outputs. It will pay to familiarise yourself with the noise models for op amp circuits (e.g., [6]) and to implement a spreadsheet to calculate noise levels for your particular circuit. Simpler, but less versatile, is to use op amp manufacturers noise reckoning tools (e.g., [7]). Best is to use a full-blown SPICE simulator (e.g., [8]).

You will find that your choice of op amps in each stage is generally restricted to relatively few which have the requisite voltage (and/or current) noise performance. The world is full of op amps, most of them no good for audio. On the other hand, beware the 'best audio op amp' syndrome.

There is simply no op amp which will behave best in every audio stage. In each case, you need to select the right one for the job. Usually you can do this from data, by trading off particular requirements against cost, power etc. But don't be afraid to use trial and error in the end – although it needs some determination and good eyesight in this age of SMT. With some dexterity, you can persuade DIL sockets onto the SOIC sites in your prototype, and you're in tweaky heaven. In general, I like to use dual op amp sites – it is a good tradeoff of cost and choice, and allows tight layout in balanced circuits. Anyway, enough said about op amps – I don't need the death-threats, so I'm not going to recommend any.

Inverting op amp topologies are generally preferred to non-inverting, since the input terminals operate at a comforting virtual earth. The dynamic input-common-mode-voltage of non-inverting configurations may add distortion, particularly at high frequencies with some op amps, with others apparently not.

Consider adopting a fully balanced topology end-to-end (perhaps using a symmetrizer in the ADC case to achieve balance through the channel even with unbalanced inputs – but be sure to avoid mode-conversion). This not only reduces interference and crosstalk, but can also achieve higher performance since distortion mechanisms often tend to cancel. Most high-end data converters like to operate in a balanced mode anyway.

It is important to select a gain structure which maximises the dynamic range (SNR) and thus minimises the need for excessively low noise design, with its attendant cost. Even so, resistor values need to be low enough for their thermal noise to be out of the picture, but not so low as to bring problems of over-dissipation or circuit loading.

Linearity of resistors and capacitors is also very important: resistors must be metal-film or thin-film types, not the usual chip resistors which are made of dirt and spit and change resistance according to voltage and the seasons. Capacitors must be low-k ceramic types (C0G/NP0) or low-loss plastic (e.g., polystyrene). Failure to observe this leads to non-linearity (distortion) in most circuit topologies. Electrolytics should be kept out of the signal path; there are other ways to ensure extended LF response.

PCB layout of the channel circuits is critical in order to minimise both interference and inter-channel crosstalk. Make sure that the op amp output and ground nodes of the stages are outermost and the op amp input nodes are innermost in your channel strip layout.

Pay attention to the bandwidth of your stages: it's not always better to go for a 'DC-to-light' approach; limiting the bandwidth at the top end reduces susceptibility to interference (and the presence of excessive HF, even if inaudible, does no good to the in-band signal); limiting the bottom end removes 'wandering DC' which can cause problems which mixing and switching, as well as the risk of unexpected overload. On the other hand, keep a healthy disrespect for the '-3dB 20-20k' approach. Extend the top and bottom end beyond the bare-essentials where you can, and strive to keep the area in between very flat – you will notice the difference.

Advice about the data converter reference voltage
Nearly all data converters have at least one accessible reference voltage (or current) pin. The input to the converter is multiplied by the reference to produce the output, and so what you do to the reference is just as important as the analogue signal path: any noise or interference on the reference will modulate the converter output. Internally-generated voltage references must be filtered with suitable capacitors placed very close to the pins – an assortment of low-value HF parts and larger electrolytic/tantalum types are usually required.

It may be preferable in some situations to drive a voltage reference externally from a well-regulated and filtered source. Some converter devices require both high and low reference voltages to define their operating range, and some require separate references per channel. Whilst the actual reference voltages may sometimes be user-modified to some degree, converter performance is often optimised at a particular voltage so it's best to stay there.

A parting word: when you have distortion or noise problems, and you've looked everywhere else, don't forget the reference. If you have modulation issues (sidebands or noise skirts around the signal frequency): if it gets worse with increasing signal frequency, it's jitter; if it doesn't, it's probably the reference voltage. Check out [9] if you don't believe me.