Design Article
A new audio amplifier topology with push-pull transimpedance stage - Part 1: Introduction
Samuel Groner
8/29/2012 10:54 AM EDT
As shown above the main power supply rejection limitation in typical two-stage amplifier topologies arises from the reference of the input of the transimpedance stage to at least one supply rail. More specific, the emitter of the common-emitter transistor in the transimpedance stage is connected directly to the power supply, which then forwards power supply ripple to the input of the transimpedance stage.
From this node Miller compensation transfers the ripple to the second stage output. Can't we simply connect the emitter of the common-emitter transistor in the transimpedance stage to ground, in order to also reference the Miller compensation loop to ground? This is not straightforward, because the collector of this transistor needs to be able to swing nearly all the way from the negative to the positive power supply; furthermore, the input voltage of the second stage is then at a potential which is inconvenient to drive from the input stage without greatly limiting the common-mode input range of the differential pair.Fortunately not straightforward does not mean impossible in this case. We can use folded cascodes both to level shift the output current of the first stage to the input of the transimpedance stage, and to free the collector of the common-emitter transistor from any significant voltage swing. Folded cascodes are non inverting stages and, being common-base transistor configurations, typically reduce stability margins of the global feedback loop by a small amount only. Hence there are only minor fundamental implementation problems to be expected.
Figure 4 depicts a first attempt to design such an amplifier. Q5 forms the folded cascode which acts as level shifter for the output current of the input stage, and Q8 provides the folded cascode for the output of the basic transimpedance stage realised by Q6 and Q7.

The input node of the transimpedance stage (the base of Q6) is now indeed, through the base-emitter junctions of Q6 and Q7, referenced to ground. It results that the basic power supply rejection will be high and independent of frequency.
At first it might look as if the collector current of Q7 were undefined; however, V2 forces a fixed voltage across, and hence a fixed current through, R5. Ignoring the base current loss of Q8, the difference between this current and that set by I3 is then, by the action of global feedback, enforced as collector current for Q7. Also noteworthy is the fact that there is just one compensation capacitor needed - there is no chance that capacitor mismatch can introduce distortion, instability or a power supply rejection limitation as observed for some prior art topologies.
While practical implementation of such a circuit is perfectly feasible, the output of the transimpedance stage is not yet a push-pull configuration and will have similar slew rate limits as the one from figure 1. The amplifier revealed by figure 5 fixes this.

The transimpedance stage (Q7–Q12) is now arranged as complementary push-pull configuration. Unlike the amplifier from figure 2, there is no need for an explicit bias current control circuit; the voltage from Q7 emitter to Q8 emitter provides bias for Q9 and Q10. The input node of the transimpedance stage (the bases of Q7 and Q8) is still referenced to ground by the emitters of Q9 and Q10. Hence the basic power supply rejection is good.
As an additional change, both collectors of the input pair are now level shifted with folded cascodes (Q3 and Q4), and the current mirror (formed by Q5 and Q6) is placed after the cascodes. This minimises the impact of the folded cascode to collector current balance of the differential pair of the input stage, and with the dual folded cascode the differential pair is operated at very nearly equal collector voltage; this reduces secondary limitations to offset, drift, common-mode rejection and power supply rejection.
In the next sections we will look into the optimum practical realisation of amplifiers with this novel transimpedance stage, and explore several extensions and adaptations of it.
Coming up in Part 2: Biasing Considerations, stability and AC performance
References
[1] Douglas Self: Audio Power Amplifier Design Handbook, 5th edition, Focal Press, 2009
[2] Bob Cordell: Designing Audio Power Amplifiers, 1st edition, McGraw-Hill, 2010
[3] J. E. Solomon: TheMonolithicOp Amp: A Tutorial Study, IEEE J. Solid-State Circuits, vol. 9, no. 6, pp. 314–332, December 1974
[4] Bhupendra K. Ahuja: An Improved Frequency Compensation Technique for CMOS Operational Amplifiers, IEEE J. Solid-State Circuits, vol. SC-18, no. 6, pp. 629–633, December 1983
[5] Samuel Groner: Comments on Audio Power Amplifier Design Handbook by Douglas Self, February 2011, available for download from www.sg-acoustics.ch/analogue_audio/power_amplifiers/pdf/audio_power_amp_design_comments.pdf
[6] Bruno Putzeys: The F-word - or,why there is no such thing as too much feedback, Linear Audio, vol. 1, pp. 112–132, April 2011
[7] Royal A. Gosser, Jeffrey A. Townsend: Integrated-Circuit (IC) AmplifierWith Plural Complementary Stages, US Patent 5,537,079, filed December 1994, issued July 1996
[8] Giovanni Stochino: Ultra-fast amplifier, Electronics &WirelessWorld, pp. 835–841, October 1995
[9] Alberto Bilotti: Noise Characteristics of Current Mirror Sinks/Sources, IEEE J. Solid-State Circuits, vol. SC-10, no. 6, pp. 516–524, December 1975
[10] William H. Gross: New High Speed Amplifier Designs, Design Techniques and Layout Problems, Analog Circuit Design: Operational Amplifiers, Analog to Digital Convertors, Analog Computer Aided Design, Springer, 1993
[11] William F. Davis, Robert L. Vyne: Design Techniques for Improving the HF Response of a Monolithic JFET Operational Amplifier, IEEE J. Solid-State Circuits, vol. SC-19, no. 6, pp. 978–985, December 1984
[12] Graeme John Cohen: Double Balanced Microphone Amplifier, AES preprint, no. 2106, August 1984
[13] Bruno Putzeys: High-Performance Discrete Building Blocks for Balanced Audio Signal Processing, AES preprint, no. 6294, October 2004
About the author
Samuel Groner was born and currently lives in Zurich, Switzerland. He has been passionate about both art and science as long as he can remember. At present he works for Weiss Engineering Ltd. in the field of analogue hardware design and freelances as classical recording engineer/producer. Besides this, he teaches several courses at a local sound engineering school (ear training, classical music production and audio measurement) and enjoys a manifold activity as pianist, singer and choirmaster. If time permits, he is found on one of the numerous Swiss hiking trails, preferably in company with one of his cameras and a few sheets of black-and-white film. He holds a MSc degree in computer science and a MA degree as Tonmeister (recording engineer/producer).
This article originally appeared in Linear Audio Volume 2, September 2011. Linear Audio, a book-size printed tech audio resource, is published half-yearly by Jan Didden.
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StephanWeber
8/30/2012 10:51 AM EDT
Nice circuit, but not really new. There are also some disadvantages not mentioned unfortunately. The slew limit from input stage and Q11/12 remains. The mid-stage Q9 can easily drive Q11 too hard (Q11 then in cut-off!). Here better add a clamping circuit. Allmost all transistors need to withstand high-voltages and the signal has to travel through many stages, that makes the whole amp quite unstable. The older mentioned circuit can be also improved to get rid some the mentioned limitations. For instance the filtering for ripple rejection is quite easy to implement with little effort.
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GK77
8/31/2012 11:42 PM EDT
I had come up with the exact same symmetrical TIS design as Samuel, independently, which I confirmed by corresponding with Samuel after the article was published in Linear Audio, before seeing the article my self. So I have to agree it is a clever design : - ).
My only reservation with Samuels’s article is that it did not venture into a loop gain analysis of the Miller compensation loop. As some might find it of use I’ve uploaded some of my own analysis, including detail of an alternative method (shunt compensation) of predictably stabilising the Miller compensation loop, onto the net here:
http://www.users.on.net/~glenk/millerloop/millerloopstability.htm
Cheers,
Glen
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