Design Article

IMG1

Multiple techniques solve stability problems in power op amps (Part 3 of 3 )

Sam Robinson, Cirrus Logic, Apex Precision Power

10/27/2008 9:10 AM EDT

Editor's note: this series consists of three parts:
  • Part 1 looks at Bode Plots, power op amp behavior versus frequency, and a first-order check for stability, click here
  • Part 2 looks at four compensating techniques, including phase, feedback zero, noise gain, and isolation resistor compensation, click here
  • Part 3 provides examples of compensation techniques, including feedback zero, feedback zero and noise gain, compensation, click here
Examples of compensation techniques
An uncompensated power op amp is shown in Figure 11, with its Bode Plot depicted in Figure 12. The following sections will show how this circuit can be stabilized using two of the techniques described previously. By using two techniques simultaneously, tradeoffs can be balanced to optimize bandwidth. Note that the 50 kHz pole in the open loop gain (AOL) shown in Figure 12 is due to the capacitive load impedance. This uncompensated circuit is unstable because the closed loop gain 1/β intersects the open loop gain at a rate of 40 dB per decade.


Figure 11: Uncompensated power op amp
(Click on image to enlarge)


Figure 12: Uncompensated power op Amp–Bode Plot
(Click on image to enlarge)

Feedback Zero Compensation–By adding a compensating capacitor (CF), to the circuit shown in Figure 11, the circuit becomes the one shown in Figure 13, and its corresponding Bode Plot response appears in Figure 14. This is achieved by adding the feedback capacitor (CF) to alter the 1/β line by placing a pole in the 1/β plot so that it intersects the red line at an angle less than 40 db per decade–and also happens to be just under 200 kHz.

The resulting usable bandwidth is approximately 30 kHz. This technique is very sensitive to variations in the value of the feedback capacitor. Note that a ±20% tolerance capacitor in the Figure 14 plot moves that pole over a 100 kHz range. This makes the plot very susceptible to going in and out of stability as the capacitor's value changes with fluctuations in temperature.


Figure 13: Feedback zero compensation schematic
(Click on image to enlarge)


Figure 14: Feedback zero compensation Bode Plot
(Click on image to enlarge)

Feedback Zero and Noise Gain Compensated–Finally, Figure 15 and Figure 16 illustrate a circuit with corresponding Bode amplitude plot for a power amplifier employing both feedback zero and noise gain compensation. With noise gain compensation, bandwidth is sacrificed, and with a feedback zero compensation the circuit is vulnerable to changes in the value of the capacitor with changing temperature. The goal here is to use multiple techniques to lessen the impact of the trade offs. This combination realizes a usable bandwidth in the neighborhood of 30 kHz, and the circuit is quite tolerant of changes in temperature. What's more, there is plenty of phase margin.


Figure 15: Feedback zero and noise gain compensated schematic
(Click on image to enlarge)


Figure 16: Feedback zero and noise gain compensated Bode Plot
(Click on image to enlarge)

References
1. The Art of Electronics, Second Edition, Paul Horowitz and Winfield Hill, Cambridge University Press, 1989, p. 242
2. Application Note APEX - AN47, Techniques for Stabilizing Power Op Amplifiers, Section 4, Cirrus Logic, www.cirruslogic.com

Bibliography
1. Network Analysis And Feedback Amplifier Design, H.W. Bode, D. Van Nostrand., 1945
2. Intuitive Operational Amplifiers, Thomas M. Fredericksen, McGraw-Hill Book Co., 1988

About the author
Sam Robinson is Marketing and Applications Manager for the Apex Precision Power™ product family at Cirrus Logic, Inc. His role involves management of product development and marketing, as well as overseeing the applications technical support for this high performance, high precision analog product family. He holds a BSEE from the University of Alabama, Huntsville. Sam has enjoyed a 15+ year tenure working in the power-analog market space.


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